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1. 发明授权

US08352807B2 Semiconductor memory device, host device and semiconductor memory system 有权
标题翻译：半导体存储器件，主机器件和半导体存储器系统
公开(公告)号：US08352807B2
公开(公告)日：2013-01-08
申请号：US12652790
申请日：2010-01-06
申请人： Hideaki Yamashita , Takeshi Ootsuka
发明人： Hideaki Yamashita , Takeshi Ootsuka
IPC分类号： G06F11/00
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/7202
摘要： A host device 200A includes a data buffer 250. When data has been already written to a part of a physical block and data is additionally written to the physical block, it is determined whether or not the data written to the physical block is held in the data buffer. When the data is held, data is written to the block, and when an error exists, data in unit of physical blocks is rewritten. When the data is not held in the data buffer, a new physical block is required to be secured and then, data is written to the new block. Thereby, even when power is shut off or an error occurs during writing in the semiconductor memory device, destruction of data already written is prevented.
摘要翻译：主机设备200A包括数据缓冲器250.当数据已被写入物理块的一部分并且数据被附加地写入物理块时，确定写入物理块的数据是否被保存在数据缓冲区。当数据保持时，将数据写入块，当存在错误时，重写物理块单位的数据。当数据不保存在数据缓冲器中时，需要新的物理块来保护数据，然后将数据写入新的块。因此，即使当在半导体存储器件中写入期间断电或出现错误时，也可以防止已经写入的数据的破坏。

2. 发明申请

US20110041036A1 SEMICONDUCTOR RECORDING DEVICE 有权
标题翻译：半导体记录装置
公开(公告)号：US20110041036A1
公开(公告)日：2011-02-17
申请号：US12988660
申请日：2009-04-20
申请人： Takeshi Ootsuka
发明人： Takeshi Ootsuka
IPC分类号： G06F11/08
CPC分类号： G06F11/1048
摘要： An error correction code of (N+M) words is configured by adding an ECC parity of M word (M is a natural number) to N words extracted at an interval of A words with respect to data of (A*N) words (A and N are natural numbers) inputted via an interface 1. A data distributor 3 distributes (N+M) words to the respective (N+M) physical blocks to record by A words. In a case where a writing error has occurred, data recorded in a cell sharing page of the page and in a page of another physical block configuring the error correction code is read. A disappearing correction is carried out to the data of the cell sharing page by using the data, and thus the data of the cell sharing page is recovered and written. In this manner, in the multi-level nonvolatile memory, an error in writing of a certain page can be prevented from propagating to a written page sharing a cell.
摘要翻译：通过将M字（M是自然数）的ECC奇偶校验相对于（A * N）个字的数据（A * N）字（A * N））的A字提取的N个字添加到（N + M）个字的纠错码 A和N是自然数）。数据分配器3将（N + M）个字分配到各个（N + M）个物理块以通过A字记录。在发生写入错误的情况下，读取记录在页面的单元共享页面和配置纠错码的另一个物理块的页面中的数据。通过使用数据对小区共享页面的数据进行消失校正，从而恢复和写入小区共享页面的数据。以这种方式，在多级非易失性存储器中，可以防止某个页面的写入错误传播到共享单元的书写页面。

3. 发明申请

US20100174951A1 SEMICONDUCTOR MEMORY DEVICE, HOST DEVICE AND SEMICONDUCTOR MEMORY SYSTEM 有权
标题翻译：半导体存储器件，主机器件和半导体存储器系统
公开(公告)号：US20100174951A1
公开(公告)日：2010-07-08
申请号：US12652790
申请日：2010-01-06
申请人： Hideaki YAMASHITA , Takeshi OOTSUKA
发明人： Hideaki YAMASHITA , Takeshi OOTSUKA
IPC分类号： G06F11/16 , G06F12/00 , G06F12/10 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/7202
摘要： A host device 200A includes a data buffer 250. When data has been already written to a part of a physical block and data is additionally written to the physical block, it is determined whether or not the data written to the physical block is held in the data buffer. When the data is held, data is written to the block, and when an error exists, data in unit of physical blocks is rewritten. When the data is not held in the data buffer, a new physical block is required to be secured and then, data is written to the new block. Thereby, even when power is shut off or an error occurs during writing in the semiconductor memory device, destruction of data already written is prevented.
摘要翻译：主机设备200A包括数据缓冲器250.当数据已被写入物理块的一部分并且数据被附加地写入物理块时，确定写入物理块的数据是否被保存在数据缓冲区。当数据保持时，将数据写入块，当存在错误时，重写物理块单位的数据。当数据不保存在数据缓冲器中时，需要新的物理块来保护数据，然后将数据写入新的块。因此，即使当在半导体存储器件中写入期间断电或出现错误时，也可以防止已经写入的数据的破坏。

4. 发明申请

US20080091735A1 DOCUMENT MANAGEMENT SYSTEM 审中-公开
标题翻译：文件管理系统
公开(公告)号：US20080091735A1
公开(公告)日：2008-04-17
申请号：US11866598
申请日：2007-10-03
申请人： Takayuki FUKUSHIMA , Koichi NAGOSHI , Takeshi OOTSUKA , Ikuo YOSHIDA
发明人： Takayuki FUKUSHIMA , Koichi NAGOSHI , Takeshi OOTSUKA , Ikuo YOSHIDA
IPC分类号： G06F17/30
CPC分类号： G06F21/645 , G06F16/93 , G06F21/6209 , G06F2221/2151
摘要： Relevant document data are retrieved from a document management server that stores document data in accordance with a user operation at a document management client. A content of the document data is shown to the user at the document management client so that the user can provide an instruction whether to execute an alteration prevention by an operation of the user. When an instruction to execute an alteration prevention is provided, alteration prevention processing is executed at the document management server.
摘要翻译：从文档管理服务器检索相关文档数据，该文档管理服务器根据文档管理客户端处的用户操作来存储文档数据。在文件管理客户端向用户显示文档数据的内容，使得用户可以通过用户的操作提供是否执行改变防止的指令。当提供执行改变预防的指令时，在文件管理服务器执行改变防止处理。

5. 发明授权

US07175714B2 Electrode-built-in susceptor and a manufacturing method therefor 有权
标题翻译：电极内置感受体及其制造方法
公开(公告)号：US07175714B2
公开(公告)日：2007-02-13
申请号：US10613574
申请日：2003-07-03
申请人： Takeshi Ootsuka , Kazunori Endou
发明人： Takeshi Ootsuka , Kazunori Endou
IPC分类号： H01L29/06 , H01L21/00
CPC分类号： H01J37/32009 , C23C16/4581 , H01J37/3255
摘要： An electrode-built-in susceptor comprises a mounting plate and a supporting plate which are made of an aluminium-nitride-group-sintered member, an inner electrode which is made of a conductive aluminium-nitride-tantalum-nitride-composite-sintered-member or a conductive aluminium-nitride-tungsten-composite-sintered-member so as to be formed between the mounting plate and the supporting plate, power supplying terminals 16, 16 which is disposed in fixing holes 13, 13 which are formed on the supporting plate so as to be attached to the inner electrode. The power supplying terminals are made of a conductive aluminium-nitride-tantalum-nitride-composite-sintered-member.By doing this, it is possible to provide an electrode-built-in susceptor which has superior durability under a high temperature oxidizing atmosphere condition and a method for manufacturing an electrode-built-in susceptor with a high product yield and a low production cost.
摘要翻译：电极内置基座包括由氮化铝基烧结构件制成的安装板和支撑板，由导电氮化铝 - 氮化钽 - 复合烧结构件制成的内部电极，构件或导电性氮化铝 - 钨复合烧结构件，以形成在安装板和支撑板之间;供电端子16,16，其设置在形成在支撑件上的固定孔13,13中; 板，以便附接到内电极。供电端子由导电氮化铝 - 氮化钽 - 复合烧结构件制成。通过这样做，可以提供一种在高温氧化气氛条件下具有优异的耐久性的电极内置基座，以及具有高产品收率和低生产成本的电极内置基座的制造方法。

6. 发明授权

US06693789B2 Susceptor and manufacturing method thereof 有权
标题翻译：受体及其制造方法
公开(公告)号：US06693789B2
公开(公告)日：2004-02-17
申请号：US09825860
申请日：2001-04-03
申请人： Hiroshi Inazumachi , Takeshi Ootsuka , Takeshi Kawase
发明人： Hiroshi Inazumachi , Takeshi Ootsuka , Takeshi Kawase
IPC分类号： H02N1300
CPC分类号： H01L21/6835 , Y10T29/49124
摘要： A built-in electrode type susceptor having excellent corrosion resistance and plasma resistance is obtained. A placement plate and a support plate made of ceramics are prepared, fixation holes are formed in this support plate, and feeding terminals consisting of a conductive composite ceramics are fitted into these fixation holes so as to penetrate through the support plate. A conductive material layer consisting of a conductive composite ceramics is formed on this support plate so as to come into contact with the feeding terminals, and the support plate and the placement plate are overlapped on each other via the conductive material layer on the support plate, and subjected to sintering and heat treatment under application of pressure, to thereby integrate these plates. Also, the conductive material layer is used as an internal electrode consisting of a conductive composite ceramics sintered body, to thereby obtain a built-in electrode type susceptor. At the time of overlapping and bonding the placement plate and the support plate, these may be bonded via a nonconductive layer having the same material as these plates.
摘要翻译：获得具有优异的耐腐蚀性和等离子体电阻的内置电极型基座。准备了由陶瓷制成的放置板和支撑板，在该支撑板上形成固定孔，将由导电性复合陶瓷构成的馈电端子嵌入到这些固定孔内，从而穿过支撑板。在该支撑板上形成由导电性复合陶瓷构成的导电性材料层，以与馈电端子接触，支撑板和配置板通过支撑板上的导电材料层彼此重叠，并在施加压力下进行烧结和热处理，从而使这些板结合。此外，导电材料层用作由导电复合陶瓷烧结体组成的内部电极，从而获得内置的电极型基座。在重叠和接合放置板和支撑板时，它们可以通过与这些板具有相同材料的非导电层接合。

7. 发明授权

US5587807A Apparatus for processing digital video data with error correction parity comprising error concealment means 失效
标题翻译：用于处理具有错误校正奇偶校验的数字视频数据的装置，包括错误隐藏装置
公开(公告)号：US5587807A
公开(公告)日：1996-12-24
申请号：US317793
申请日：1994-10-04
申请人： Takeshi Ootsuka , Masaaki Higashida
发明人： Takeshi Ootsuka , Masaaki Higashida
IPC分类号： H04N5/92 , G11B20/12 , G11B20/18 , H04N5/926 , H04N5/94 , H04N5/76
CPC分类号： H04N5/9261 , G11B20/1809 , G11B20/1876 , H04N5/94
摘要： In an apparatus for processing input N-bit digital video data with an error correction parity, the input N-bit digital video data includes each one sample of higher-order-N-bit data and a plurality of samples of lower-order-(M-N)-bit data, wherein M>N. An error correction circuit corrects an error of input N-bit digital video data, outputs error-corrected N-bit digital video data, and generates an error detection signal representing an error which can not be corrected. Further, a data combining circuit converts the error-corrected N-bit digital video data into M-bit digital video data, and an error classifying circuit classifies the error detection signal into a first error detection signal representing an error of the each one sample of the higher-order-N-bit data and a second error detection signal representing an error of the plurality of samples of the lower-order-(M-N)-bit data. An error concealment circuit performs an error concealment process for the converted M-bit digital video data based on only the first error detection signal.
摘要翻译：在用于处理具有纠错奇偶校验的输入N位数字视频数据的装置中，输入的N位数字视频数据包括高阶N位数据的每一个采样和低阶N位数据的多个采样 MN）位数据，其中M> N。错误校正电路校正输入的N位数字视频数据的误差，输出经纠错的N位数字视频数据，并产生表示无法校正的错误的错误检测信号。此外，数据组合电路将经纠错的N位数字视频数据转换为M位数字视频数据，误差分类电路将误差检测信号分类为表示每个样本的误差的第一错误检测信号高位N位数据和表示低阶（MN）位数据的多个样本的误差的第二错误检测信号。错误隐藏电路仅对第一错误检测信号进行转换的M位数字视频数据的错误隐藏处理。

8. 发明授权

US10565137B2 Non-volatile memory device and controlling apparatus, having extension activating and control parts, where memory device can be operated in an optimum operation mode 有权
公开(公告)号：US10565137B2
公开(公告)日：2020-02-18
申请号：US12501894
申请日：2009-07-13
申请人： Hideaki Yamashita , Takeshi Ootsuka
发明人： Hideaki Yamashita , Takeshi Ootsuka
IPC分类号： G06F13/28 , G06F3/00 , G06F13/16
摘要： A memory device controlling apparatus of the present invention includes a device information requesting part that requests device information with respect to a memory device, when recognizing that the memory device is connected to the memory device controlling apparatus, and an extension activating part that activates an extension of the memory device based on the device information acquired in the device information requesting part. The memory device controlling apparatus accesses the memory device using the extension in the memory device. Such a configuration enables the memory device and the memory device controlling apparatus to be operated in an optimum operation mode in accordance with the characteristics of each bus, a host PC, and the memory device.

9. 发明授权

US08751770B2 Semiconductor recording apparatus and semiconductor recording system 有权
标题翻译：半导体记录装置和半导体记录系统
公开(公告)号：US08751770B2
公开(公告)日：2014-06-10
申请号：US12812238
申请日：2008-10-06
申请人： Takeshi Ootsuka
发明人： Takeshi Ootsuka
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7201 , G11C8/06
摘要： A semiconductor recording apparatus includes a logical-to-physical conversion table 115 showing correspondence between a physical address of said semiconductor memory and a logical address and writes the table to a flash memory 120. On receiving a write command issued from a host device 200, a block management section 114 selects a physical block with reference to said logical-to-physical conversion table, and updates said logical-to-physical conversion table. A logical-to-physical conversion table initializing section 117 updates a physical address corresponding to each logical address of the logical-to-physical conversion table into an invalid address. Accordingly the apparatus can render the number of rewrites of physical blocks uniform irrespective of writing conditions.
摘要翻译：半导体记录装置包括表示所述半导体存储器的物理地址与逻辑地址之间的对应关系的逻辑到物理转换表115，并将该表写入闪速存储器120.在接收到从主机设备200发出的写命令时，块管理部分114参考所述逻辑到物理转换表选择物理块，并更新所述逻辑到物理转换表。逻辑到物理转换表初始化部分117将对应于逻辑到物理转换表的每个逻辑地址的物理地址更新成无效地址。因此，无论写入条件如何，该装置可以使物理块的重写数量均匀化。

10. 发明授权

US08397015B2 Memory controller, semiconductor recording device, and method for notifying the number of times of rewriting 有权
标题翻译：存储器控制器，半导体记录装置和通知重写次数的方法
公开(公告)号：US08397015B2
公开(公告)日：2013-03-12
申请号：US12598957
申请日：2008-04-18
申请人： Takeshi Ootsuka
发明人： Takeshi Ootsuka
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F13/1668 , G11C16/349
摘要： User data transferred from a host apparatus and a first information table 35 indicating correspondence between a logical address and a physical address are recorded in a first region of a flash memory 20. A second information table 38 composed of the physical block address storing the first information table 35 and the number of times of update of the physical block for recording the first information table from the time of manufacturing is recorded in a second region of the flash memory 20. The physical blocks of the first and the second regions are recorded independently from each other in a rotational manner. According to the recording of the second information table, the total number of times of rewriting of the first region is converted. This can suppress the number of times of rewriting of the second region and improve reliability of the number of times of update of the first information table from the time of manufacturing, the number being recorded in the second region.
摘要翻译：从主机装置传送的用户数据和指示逻辑地址与物理地址之间的对应关系的第一信息表35被记录在闪速存储器20的第一区域中。第二信息表38由存储第一信息的物理块地址表35和从制造时刻开始记录第一信息表的物理块的更新次数被记录在闪速存储器20的第二区域中。第一和第二区域的物理块被独立地记录彼此以旋转的方式。根据第二信息表的记录，转换第一区域的总重写次数。这可以抑制第二区域的重写次数，并且提高从制造时起第一信息表的更新次数的可靠性，该数量被记录在第二区域中。

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