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    • 4. 发明授权
    • Correlation detector for use in a spread spectrum communications receiver
    • 用于扩频通信接收机的相关检测器
    • US5832021A
    • 1998-11-03
    • US865658
    • 1997-05-30
    • Tadayuki Kondo
    • Tadayuki Kondo
    • H04B1/707H04B1/7085H04B15/00H04L7/00H04J3/06
    • H04B1/7085
    • A digital delay-locked loop (DLL) circuit of high synchronous maintaining precision, which is usually affected by the quantization error of signal digitization, is provided for a spread spectrum communications receiver for mobile communications system. Three correlation sections are provided for calculating the correlation values in the peak phase, in the phase leading the peak phase and in the phase lagging behind the peak phase respectively in a delay profile on the basis of a received signal. A control section calculates the difference of the correlation values between the value in the lagging phase and the value of the advancing phase, and determines the threshold value for controlling a spread code generation section. The control section controls so as to advance the generation timing of spread code when the difference between the correlation values is greater than the positive threshold value, so as to delay the generation timing of when the difference value is smaller than the negative threshold value, and so as not to vary the generation timing when the difference value is smaller than the positive threshold value, but greater than the negative threshold value.
    • 为移动通信系统的扩频通信接收机提供了通常受信号数字化量化误差影响的高同步保持精度的数字延迟锁定环路(DLL)电路。 提供了三个相关部分,用于在基于接收信号的延迟分布中分别引导峰值相位和相位滞后于相位的相位中的峰值相位中的相关值。 控制部分计算滞后阶段的值与前进相位的值之间的相关值的差,并且确定用于控制扩展码产生部分的阈值。 当相关值之间的差大于正阈值时,控制部分控制以提高扩频码的产生定时,以便延迟当差值小于负阈值时的产生定时,以及 使得当差值小于正阈值但大于负阈值时不改变发生定时。