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1. 发明申请

US20120123763A1 METHOD AND APPARATUS FOR EXECUTING A HARDWARE SIMULATION AND VERIFICATION SOLUTION 有权
标题翻译：用于执行硬件仿真和验证解决方案的方法和装置
公开(公告)号：US20120123763A1
公开(公告)日：2012-05-17
申请号：US13359386
申请日：2012-01-26
申请人： Manish Jain , Subha S. Chowdhury , Sridhar Seshadri
发明人： Manish Jain , Subha S. Chowdhury , Sridhar Seshadri
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/5022
摘要： One embodiment of the present invention provides systems and techniques to execute a hardware simulation and verification solution on a multiprocessor system. The hardware simulation and verification solution can be partitioned into different modules which can include a simulation kernel to simulate changes in signal values, a value change dump module to store the changes in the signal values on a computer-readable storage medium, a functional coverage module to check functionality, a toggle coverage module to check signal toggling, an assertion engine to check complex behaviors, and a testbench module to generate test scenarios. Embodiments of the present invention can execute different modules on different processors, thereby improving performance.
摘要翻译：本发明的一个实施例提供了在多处理器系统上执行硬件仿真和验证解决方案的系统和技术。硬件仿真和验证解决方案可以划分成不同的模块，其中可以包括模拟内核来模拟信号值的变化，值改变转储模块，用于将信号值的变化存储在计算机可读存储介质上，功能覆盖模块检查功能，切换覆盖模块以检查信号切换，用于检查复杂行为的断言引擎，以及测试台模块来生成测试场景。本发明的实施例可以在不同的处理器上执行不同的模块，从而提高性能。

2. 发明申请

US20090276738A1 METHOD AND APPARATUS FOR EXECUTING A HARDWARE SIMULATION AND VERIFICATION SOLUTION 有权
标题翻译：用于执行硬件仿真和验证解决方案的方法和装置
公开(公告)号：US20090276738A1
公开(公告)日：2009-11-05
申请号：US12112222
申请日：2008-04-30
申请人： Manish Jain , Subha S. Chowdhury , Sridhar Seshadri
发明人： Manish Jain , Subha S. Chowdhury , Sridhar Seshadri
IPC分类号： G06F9/45
CPC分类号： G06F17/5045 , G06F17/5022
摘要： One embodiment of the present invention provides systems and techniques to execute a hardware simulation and verification solution on a multiprocessor system. The hardware simulation and verification solution can be partitioned into different modules which can include a simulation kernel to simulate changes in signal values, a value change dump module to store the changes in the signal values on a computer-readable storage medium, a functional coverage module to check functionality, a toggle coverage module to check signal toggling, an assertion engine to check complex behaviors, and a testbench module to generate test scenarios. Embodiments of the present invention can execute different modules on different processors, thereby improving performance.
摘要翻译：本发明的一个实施例提供了在多处理器系统上执行硬件仿真和验证解决方案的系统和技术。硬件仿真和验证解决方案可以划分成不同的模块，其中可以包括模拟内核来模拟信号值的变化，值改变转储模块，用于将信号值的变化存储在计算机可读存储介质上，功能覆盖模块检查功能，切换覆盖模块以检查信号切换，用于检查复杂行为的断言引擎，以及测试台模块来生成测试场景。本发明的实施例可以在不同的处理器上执行不同的模块，从而提高性能。

3. 发明授权

US08341570B2 Method and apparatus for executing a hardware simulation and verification solution 有权
公开(公告)号：US08341570B2
公开(公告)日：2012-12-25
申请号：US13359386
申请日：2012-01-26
申请人： Manish Jain , Subha S. Chowdhury , Sridhar Seshadri
发明人： Manish Jain , Subha S. Chowdhury , Sridhar Seshadri
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/5022
摘要： One embodiment of the present invention provides systems and techniques to execute a hardware simulation and verification solution on a multiprocessor system. The hardware simulation and verification solution can be partitioned into different modules which can include a simulation kernel to simulate changes in signal values, a value change dump module to store the changes in the signal values on a computer-readable storage medium, a functional coverage module to check functionality, a toggle coverage module to check signal toggling, an assertion engine to check complex behaviors, and a testbench module to generate test scenarios. Embodiments of the present invention can execute different modules on different processors, thereby improving performance.

4. 发明授权

US08121825B2 Method and apparatus for executing a hardware simulation and verification solution 有权
标题翻译：用于执行硬件仿真和验证解决方案的方法和装置
公开(公告)号：US08121825B2
公开(公告)日：2012-02-21
申请号：US12112222
申请日：2008-04-30
申请人： Manish Jain , Subha S. Chowdhury , Sridhar Seshadri
发明人： Manish Jain , Subha S. Chowdhury , Sridhar Seshadri
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/5022
摘要： One embodiment of the present invention provides systems and techniques to execute a hardware simulation and verification solution on a multiprocessor system. The hardware simulation and verification solution can be partitioned into different modules which can include a simulation kernel to simulate changes in signal values, a value change dump module to store the changes in the signal values on a computer-readable storage medium, a functional coverage module to check functionality, a toggle coverage module to check signal toggling, an assertion engine to check complex behaviors, and a testbench module to generate test scenarios. Embodiments of the present invention can execute different modules on different processors, thereby improving performance.
摘要翻译：本发明的一个实施例提供了在多处理器系统上执行硬件仿真和验证解决方案的系统和技术。硬件仿真和验证解决方案可以划分成不同的模块，其中可以包括模拟内核来模拟信号值的变化，值改变转储模块，用于将信号值的变化存储在计算机可读存储介质上，功能覆盖模块检查功能，切换覆盖模块以检查信号切换，用于检查复杂行为的断言引擎，以及测试台模块来生成测试场景。本发明的实施例可以在不同的处理器上执行不同的模块，从而提高性能。

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