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1. 发明申请

US20160292111A1 SEMICONDUCTOR MEMORY DEVICE FOR SHARING INTER-MEMORY COMMAND AND INFORMATION, MEMORY SYSTEM INCLUDING THE SAME AND METHOD OF OPERATING THE MEMORY SYSTEM 审中-公开
标题翻译：用于共享内存命令和信息的半导体存储器件，包括其的存储器系统和操作存储器系统的方法
公开(公告)号：US20160292111A1
公开(公告)日：2016-10-06
申请号：US14976865
申请日：2015-12-21
申请人： Su Yeon Doo , Tae Young Oh
发明人： Su Yeon Doo , Tae Young Oh
IPC分类号： G06F13/362 , G06F13/40 , G06F13/16
CPC分类号： G06F13/3625 , G06F13/1689 , G06F13/4068
摘要： A method of operating a memory controller, memory devices including a master memory device and slave memory devices, a back channel bus coupling the master memory device to the slave memory devices and a channel coupling the memory controller to the memory devices is provided as follows. A memory command is received by the memory devices from the memory controller. An internal command is generated and outputted by the master memory device. The internal command is received by the slave memory devices. The internal command is transmitted to the slave memory devices through the back channel bus.
摘要翻译：一种操作存储器控制器的方法，包括主存储器件和从存储器件的存储器件，将主存储器件耦合到从存存器器件的后通道总线以及将存储器控制器耦合到存储器件的通道如下。存储器设备从存储器控制器接收存储器命令。内部命令由主存储器件产生并输出。内部命令由从属存储设备接收。内部命令通过后置通道总线传输到从属存储设备。

2. 发明授权

US09059698B2 Integrated circuit devices using power supply circuits with feedback from a replica load 有权
标题翻译：使用具有来自复制负载的反馈的电源电路的集成电路器件
公开(公告)号：US09059698B2
公开(公告)日：2015-06-16
申请号：US13240635
申请日：2011-09-22
申请人： Su-yeon Doo , Seung-jun Bae , Kwang-il Park , Young-soo Sohn
发明人： Su-yeon Doo , Seung-jun Bae , Kwang-il Park , Young-soo Sohn
IPC分类号： G05F1/00 , H03K19/003 , G05F1/575
CPC分类号： H03K19/00361 , G05F1/575
摘要： An integrated circuit device includes an external power supply input configured to be coupled to an external power supply and a digital circuit, such as a clock signal generator circuit, that generates noise at a power supply input thereof. The device further includes a replica load circuit and a power supply circuit coupled to the external power supply input, to a power supply input of the digital circuit and to a power supply input of the replica load circuit. The power supply circuit is configured to selectively couple the external power supply node to the power supply input of the digital circuit responsive to a voltage at the power supply input of the replica load circuit. The replica load circuit may be configured to provide a load that varies responsive to a voltage at the power supply input of the digital circuit.
摘要翻译：集成电路装置包括被配置为耦合到外部电源的外部电源输入和在其电源输入处产生噪声的数字电路，例如时钟信号发生器电路。该装置还包括复制负载电路和耦合到外部电源输入的电源电路，数字电路的电源输入和复制负载电路的电源输入。电源电路被配置为响应于复制负载电路的电源输入处的电压来选择性地将外部电源节点耦合到数字电路的电源输入。复制负载电路可以被配置为提供响应于数字电路的电源输入处的电压而变化的负载。

3. 发明申请

US20160163377A1 SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING SAME 有权
标题翻译：半导体存储器件和包括其的存储器系统
公开(公告)号：US20160163377A1
公开(公告)日：2016-06-09
申请号：US14959003
申请日：2015-12-04
申请人： Tae Young OH , Su Yeon DOO , Seung Hoon OH , Jong Ho LEE , Kwang Il PARK
发明人： Tae Young OH , Su Yeon DOO , Seung Hoon OH , Jong Ho LEE , Kwang Il PARK
IPC分类号： G11C11/406 , G11C11/4091 , G11C11/408
CPC分类号： G11C11/40615 , G11C11/40618
摘要： A method of operating a semiconductor memory device is provided as follows. The semiconductor memory device receive a bank address for a first bank including a first word line, a second word line and a third word line. The semiconductor memory device receive a first row address to activate the first world line for a read operation or a write operation. The semiconductor memory device generates a second row address to refresh a plurality of memory cells associated with the second word line.
摘要翻译：如下提供操作半导体存储器件的方法。半导体存储器件接收包括第一字线，第二字线和第三字线的第一存储体的存储体地址。半导体存储器件接收第一行地址以激活用于读取操作或写入操作的第一世界线。半导体存储器件产生第二行地址以刷新与第二字线相关联的多个存储单元。

4. 发明申请

US20120086490A1 INTEGRATED CIRCUIT DEVICES USING POWER SUPPLY CIRCUITS WITH FEEDBACK FROM A REPLICA LOAD 有权
标题翻译：使用电源电路的集成电路装置与反馈装置的反馈
公开(公告)号：US20120086490A1
公开(公告)日：2012-04-12
申请号：US13240635
申请日：2011-09-22
申请人： Su-yeon Doo , Seung-jun Bae , Kwang-il Park , Young-soo Sohn
发明人： Su-yeon Doo , Seung-jun Bae , Kwang-il Park , Young-soo Sohn
IPC分类号： H03K3/023 , G05F1/10
CPC分类号： H03K19/00361 , G05F1/575
摘要： An integrated circuit device includes an external power supply input configured to be coupled to an external power supply and a digital circuit, such as a clock signal generator circuit, that generates noise at a power supply input thereof. The device further includes a replica load circuit and a power supply circuit coupled to the external power supply input, to a power supply input of the digital circuit and to a power supply input of the replica load circuit. The power supply circuit is configured to selectively couple the external power supply node to the power supply input of the digital circuit responsive to a voltage at the power supply input of the replica load circuit. The replica load circuit may be configured to provide a load that varies responsive to a voltage at the power supply input of the digital circuit.
摘要翻译：集成电路装置包括被配置为耦合到外部电源的外部电源输入和在其电源输入处产生噪声的数字电路，例如时钟信号发生器电路。该装置还包括复制负载电路和耦合到外部电源输入的电源电路，数字电路的电源输入和复制负载电路的电源输入。电源电路被配置为响应于复制负载电路的电源输入处的电压来选择性地将外部电源节点耦合到数字电路的电源输入。复制负载电路可以被配置为提供响应于数字电路的电源输入处的电压而变化的负载。

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