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1. 发明授权

US07961307B2 Angular spectrum tailoring in solid immersion microscopy for circuit analysis 失效
标题翻译：用于电路分析的固体浸液显微镜中的角度光谱裁剪
公开(公告)号：US07961307B2
公开(公告)日：2011-06-14
申请号：US12911781
申请日：2010-10-26
申请人： Stephen Bradley Ippolito , Darrell L. Miles , Peilin Song , John D. Sylvestri
发明人： Stephen Bradley Ippolito , Darrell L. Miles , Peilin Song , John D. Sylvestri
IPC分类号： G01N21/00
CPC分类号： G01R31/311
摘要： A structure for locating a fault in a semiconductor chip. The chip includes a substrate on a dielectric interconnect. A first electrical response image of the chip, which includes a spot representing the fault, is overlayed on a first reflection image for monochromatic light in an optical path from an optical microscope through a SIL/NAIL and into the chip. The index of refraction of the substrate exceeds that of the dielectric interconnect and is equal to that of the SIL/NAIL. A second electrical response image of the chip is overlayed on a second reflection image for the monochromatic light in an optical path in which an optical stop prevents all subcritical angular components of the monochromatic light from being incident on the SIL/NAIL. If the second electrical response image includes or does not include the spot, then the fault is in the substrate or the dielectric interconnect, respectively.
摘要翻译：用于定位半导体芯片中的故障的结构。芯片包括电介质互连上的衬底。包括代表故障的点的芯片的第一电响应图像重叠在从光学显微镜通过SIL / NAIL并进入芯片的光路中的单色光的第一反射图像上。衬底的折射率超过电介质互连的折射率，等于SIL / NAIL的折射率。芯片的第二电响应图像覆盖在光路中的单色光的第二反射图像上，其中光学停止器防止单色光的所有亚临界角分量入射到SIL / NAIL上。如果第二电响应图像包括或不包括点，则故障分别在基板或电介质互连中。

2. 发明申请

US20090189630A1 ANGULAR SPECTRUM TAILORING IN SOLID IMMERSION MICROSCOPY FOR CIRCUIT ANALYSIS 失效
标题翻译：用于电路分析的固体显微镜中的角度光谱定标
公开(公告)号：US20090189630A1
公开(公告)日：2009-07-30
申请号：US12020157
申请日：2008-01-25
申请人： Stephen Bradley Ippolito , Darrell L. Miles , Peilin Song , John D. Sylvestri
发明人： Stephen Bradley Ippolito , Darrell L. Miles , Peilin Song , John D. Sylvestri
IPC分类号： G01R31/26
CPC分类号： G01R31/311
摘要： A method and structure for locating a fault in a semiconductor chip. The chip includes a substrate on a dielectric interconnect. A first electrical response image of the chip, which includes a spot representing the fault, is overlayed on a first reflection image for monochromatic light in an optical path from an optical microscope through a SIL/NAIL and into the chip. The index of refraction of the substrate exceeds that of the dielectric interconnect and is equal to that of the SIL/NAIL. A second electrical response image of the chip is overlayed on a second reflection image for the monochromatic light in an optical path in which an optical stop prevents all subcritical angular components of the monochromatic light from being incident on the SIL/NAIL. If the second electrical response image includes or does not include the spot, then the fault is in the substrate or the dielectric interconnect, respectively.
摘要翻译：一种用于定位半导体芯片中的故障的方法和结构。芯片包括电介质互连上的衬底。包括代表故障的点的芯片的第一电响应图像重叠在从光学显微镜通过SIL / NAIL并进入芯片的光路中的单色光的第一反射图像上。衬底的折射率超过电介质互连的折射率，等于SIL / NAIL的折射率。芯片的第二电响应图像覆盖在光路中的单色光的第二反射图像上，其中光学停止器防止单色光的所有亚临界角分量入射到SIL / NAIL上。如果第二电响应图像包括或不包括点，则故障分别在基板或电介质互连中。

3. 发明授权

US09310429B2 Method and apparatus for probing a wafer 有权
标题翻译：用于探测晶片的方法和装置
公开(公告)号：US09310429B2
公开(公告)日：2016-04-12
申请号：US13462964
申请日：2012-05-03
申请人： Stephen Bradley Ippolito , Alan J. Weger
发明人： Stephen Bradley Ippolito , Alan J. Weger
IPC分类号： G01R31/00 , G01R31/311
CPC分类号： G01R31/311
摘要： A semiconductor wafer resting on a contact element has a spatially distributed force applied to its frontside and an equal and opposing force applied to its backside. The contact element comprises a solid immersion lens (SIL), and has an area less than the area of the wafer, but no less than the larger of the area of an optical collection area and an electrical probe assembly. The equal and opposing forces cause the wafer to conform to the shape of the contact element. Measurements, including electrical testing, optical probing and wafer characterization are performed on the wafer.
摘要翻译：位于接触元件上的半导体晶片具有施加到其前侧的空间分布的力，并且施加到其背面的相等且相反的力。接触元件包括固体浸没透镜（SIL），并且具有小于晶片的面积，但不小于光学收集区域和电探针组件的面积中的较大者的面积。相等和相反的力使晶片符合接触元件的形状。在晶片上进行测量，包括电测试，光学探测和晶片表征。

4. 发明授权

US08248097B2 Method and apparatus for probing a wafer 有权
标题翻译：用于探测晶片的方法和装置
公开(公告)号：US08248097B2
公开(公告)日：2012-08-21
申请号：US12417454
申请日：2009-04-02
申请人： Stephen Bradley Ippolito , Alan J. Weger
发明人： Stephen Bradley Ippolito , Alan J. Weger
IPC分类号： G01R31/02
CPC分类号： G01R31/311
摘要： A semiconductor wafer resting on a contact element has a spatially distributed force applied to its frontside and an equal and opposing force applied to its backside. The contact element comprises a solid immersion lens (SIL), and has an area less than the area of the wafer, but no less than the larger of the area of an optical collection area and an electrical probe assembly. The equal and opposing forces cause the wafer to conform to the shape of the contact element. Measurements, including electrical testing, optical probing and wafer characterization are performed on the wafer.
摘要翻译：位于接触元件上的半导体晶片具有施加到其前侧的空间分布的力，并且施加到其背面的相等且相反的力。接触元件包括固体浸没透镜（SIL），并且具有小于晶片的面积，但不小于光学收集区域和电探针组件的面积中的较大者的面积。相等和相反的力使晶片符合接触元件的形状。在晶片上进行测量，包括电测试，光学探测和晶片表征。

5. 发明申请

US20120217974A1 METHOD AND APPARATUS FOR PROBING A WAFER 有权
标题翻译：用于探测波浪的方法和装置
公开(公告)号：US20120217974A1
公开(公告)日：2012-08-30
申请号：US13462964
申请日：2012-05-03
申请人： Stephen Bradley Ippolito , Alan J. Weger
发明人： Stephen Bradley Ippolito , Alan J. Weger
IPC分类号： G01R31/00
CPC分类号： G01R31/311
摘要： A semiconductor wafer resting on a contact element has a spatially distributed force applied to its frontside and an equal and opposing force applied to its backside. The contact element comprises a solid immersion lens (SIL), and has an area less than the area of the wafer, but no less than the larger of the area of an optical collection area and an electrical probe assembly. The equal and opposing forces cause the wafer to conform to the shape of the contact element. Measurements, including electrical testing, optical probing and wafer characterization are performed on the wafer.
摘要翻译：位于接触元件上的半导体晶片具有施加到其前侧的空间分布的力，并且施加到其背面的相等且相反的力。接触元件包括固体浸没透镜（SIL），并且具有小于晶片的面积，但不小于光学收集区域和电探针组件的面积中的较大者的面积。相等和相反的力使晶片符合接触元件的形状。在晶片上进行测量，包括电测试，光学探测和晶片表征。

6. 发明授权

US07826045B2 Angular spectrum tailoring in solid immersion microscopy for circuit analysis 失效
标题翻译：用于电路分析的固体浸液显微镜中的角度光谱裁剪
公开(公告)号：US07826045B2
公开(公告)日：2010-11-02
申请号：US12020157
申请日：2008-01-25
申请人： Stephen Bradley Ippolito , Darrell L. Miles , Peilin Song , John D. Sylvestri
发明人： Stephen Bradley Ippolito , Darrell L. Miles , Peilin Song , John D. Sylvestri
IPC分类号： G01N21/00
CPC分类号： G01R31/311
摘要： A method and structure for locating a fault in a semiconductor chip. The chip includes a substrate on a dielectric interconnect. A first electrical response image of the chip, which includes a spot representing the fault, is overlayed on a first reflection image for monochromatic light in an optical path from an optical microscope through a SIL/NAIL and into the chip. The index of refraction of the substrate exceeds that of the dielectric interconnect and is equal to that of the SIL/NAIL. A second electrical response image of the chip is overlayed on a second reflection image for the monochromatic light in an optical path in which an optical stop prevents all subcritical angular components of the monochromatic light from being incident on the SIL/NAIL. If the second electrical response image includes or does not include the spot, then the fault is in the substrate or the dielectric interconnect, respectively.
摘要翻译：一种用于定位半导体芯片中的故障的方法和结构。芯片包括电介质互连上的衬底。包括代表故障的点的芯片的第一电响应图像重叠在从光学显微镜通过SIL / NAIL并进入芯片的光路中的单色光的第一反射图像上。衬底的折射率超过电介质互连的折射率，等于SIL / NAIL的折射率。芯片的第二电响应图像覆盖在光路中的单色光的第二反射图像上，其中光学停止器防止单色光的所有亚临界角分量入射到SIL / NAIL上。如果第二电响应图像包括或不包括点，则故障分别在基板或电介质互连中。

7. 发明申请

US20110037973A1 ANGULAR SPECTRUM TAILORING IN SOLID IMMERSION MICROSCOPY FOR CIRCUIT ANALYSIS 失效
标题翻译：用于电路分析的固体显微镜中的角度光谱定标
公开(公告)号：US20110037973A1
公开(公告)日：2011-02-17
申请号：US12911781
申请日：2010-10-26
申请人： Stephen Bradley Ippolito , Darrell L. Miles , Peilin Song , John D. Sylvestri
发明人： Stephen Bradley Ippolito , Darrell L. Miles , Peilin Song , John D. Sylvestri
IPC分类号： G01N21/88
CPC分类号： G01R31/311
摘要： A structure for locating a fault in a semiconductor chip. The chip includes a substrate on a dielectric interconnect. A first electrical response image of the chip, which includes a spot representing the fault, is overlayed on a first reflection image for monochromatic light in an optical path from an optical microscope through a SIL/NAIL and into the chip. The index of refraction of the substrate exceeds that of the dielectric interconnect and is equal to that of the SIL/NAIL. A second electrical response image of the chip is overlayed on a second reflection image for the monochromatic light in an optical path in which an optical stop prevents all subcritical angular components of the monochromatic light from being incident on the SIL/NAIL. If the second electrical response image includes or does not include the spot, then the fault is in the substrate or the dielectric interconnect, respectively.
摘要翻译：用于定位半导体芯片中的故障的结构。芯片包括电介质互连上的衬底。包括代表故障的点的芯片的第一电响应图像重叠在从光学显微镜通过SIL / NAIL并进入芯片的光路中的单色光的第一反射图像上。衬底的折射率超过电介质互连的折射率，等于SIL / NAIL的折射率。芯片的第二电响应图像覆盖在光路中的单色光的第二反射图像上，其中光学停止器防止单色光的所有亚临界角分量入射到SIL / NAIL上。如果第二电响应图像包括或不包括点，则故障分别在基板或电介质互连中。

8. 发明申请

US20100253379A1 Method and Apparatus for Probing a Wafer 有权
标题翻译：探测晶片的方法和装置
公开(公告)号：US20100253379A1
公开(公告)日：2010-10-07
申请号：US12417454
申请日：2009-04-02
申请人： Stephen Bradley Ippolito , Alan J. Weger
发明人： Stephen Bradley Ippolito , Alan J. Weger
IPC分类号： G01R31/02
CPC分类号： G01R31/311
摘要： A semiconductor wafer resting on a contact element has a spatially distributed force applied to its frontside and an equal and opposing force applied to its backside. The contact element comprises a solid immersion lens (SIL), and has an area less than the area of the wafer, but no less than the larger of the area of an optical collection area and an electrical probe assembly. The equal and opposing forces cause the wafer to conform to the shape of the contact element. Measurements, including electrical testing, optical probing and wafer characterization are performed on the wafer.
摘要翻译：位于接触元件上的半导体晶片具有施加到其前侧的空间分布的力，并且施加到其背面的相等且相反的力。接触元件包括固体浸没透镜（SIL），并且具有小于晶片的面积，但不小于光学收集区域和电探针组件的面积中的较大者的面积。相等和相反的力使晶片符合接触元件的形状。在晶片上进行测量，包括电测试，光学探测和晶片表征。

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