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1. 发明授权

US4054745A Motor control device for data terminals 失效
公开(公告)号：US4054745A
公开(公告)日：1977-10-18
申请号：US748079
申请日：1976-12-06
申请人： Stanley R. C. Norman
发明人： Stanley R. C. Norman
IPC分类号： H04L12/12 , H04L7/00 , H04N1/32
CPC分类号： H04L12/12 , Y02B60/34
摘要： A control device is described for linking a motor operated data terminal to a data processor which provides information signals including data characters and data terminal motor-start signals. The motor associated with the data terminal is selectively operable between an on condition and an off condition and is programmed to switch from the on condition to the off condition after a first predetermined interval following the last reception of data characters from the data processor. The data terminal motor switches to the on condition upon receipt of a data terminal motor-start signal and reaches its normal operating speed in at least a second predetermined interval after the receipt of a data terminal motor-start signal. The control device includes means for receiving the information signals from the data processor and for transmitting such signals to the data terminal. A first circuit of the control device is responsive to received information signals from the data processor for providing a motor-on status signal to the data processor and is responsive to the absence of information signals for the first predetermined interval for providing to the data processor a motor-off signal. A second circuit of the control device senses the receipt of a motor-start signal from the data processor for providing the data processor with a data terminal busy condition signal of a second predetermined interval. Following the expiration of the second predetermined interval, a terminal non-busy signal is provided to indicate to the data processor that data characters may be sent. Accordingly, upon interruption of transmission of data characters by the data processor for an interval of time equal to the first predetermined interval, the data processor is provided by the control device with a motor-off signal to indicate that a motor-start signal must be sent prior to further transmission of data characters. Upon transmission of a motor-start signal, the data processor is provided with a motor-on signal and a terminal busy condition signal. The terminal busy condition signal further inhibits transmission of data characters for the second predetermined interval until a terminal non-busy condition signal is provided.

2. 发明授权

US4314164A Computer channel access circuit for multiple input-output devices 失效
标题翻译：用于多个输入输出设备的计算机通道访问电路
公开(公告)号：US4314164A
公开(公告)日：1982-02-02
申请号：US91422
申请日：1979-11-05
申请人： Kam B. Tin , Stanley R. C. Norman
发明人： Kam B. Tin , Stanley R. C. Norman
IPC分类号： G06F13/20 , H03K17/56 , G11C7/00 , H01R3/00
CPC分类号： G06F13/20
摘要： An access circuit for use in a computer input-output channel. Retriggerable mono-stable multivibrators are used to provide access timing periods during which an input-output device can access a computer channel to the exclusion of other input-output devices.
摘要翻译：一种用于计算机输入 - 输出通道的访问电路。可再触发单稳态多谐振荡器用于提供访问定时周期，在此期间输入输出设备可以访问计算机通道以排除其他输入 - 输出设备。

3. 发明授权

US4282488A Noise eliminator circuit 失效
标题翻译：消声器电路
公开(公告)号：US4282488A
公开(公告)日：1981-08-04
申请号：US76042
申请日：1979-09-17
申请人： Stanley R. C. Norman , Kam B. Tin
发明人： Stanley R. C. Norman , Kam B. Tin
IPC分类号： H03K5/1252 , H03K21/14 , H03K5/22
CPC分类号： H03K5/1252 , H03K21/14
摘要： A noise eliminator circuit for use in a decoding circuit. A flip-flop is used to delay a first pulse train by the pulse width of a second pulse train so that pulse level transitions of the first pulse train occur non-coincident with the pulse level transitions of a synchronously generated third pulse train.
摘要翻译：一种用于解码电路的噪声消除器电路。触发器用于将第一脉冲串延迟第二脉冲序列的脉冲宽度，使得第一脉冲串的脉冲电平转换与同步产生的第三脉冲序列的脉冲电平转换不一致。

4. 发明授权

US4063180A Noise detecting circuit 失效
标题翻译：噪声检测电路
公开(公告)号：US4063180A
公开(公告)日：1977-12-13
申请号：US731402
申请日：1976-10-12
申请人： Stanley R. C. Norman
发明人： Stanley R. C. Norman
IPC分类号： G01R29/26 , H03K5/20
CPC分类号： G01R29/26
摘要： A noise detecting circuit for a data processing channel operates on incoming noise pulses and trains of data pulses, each train of which is preceded by a start pulse of a duration substantially greater than the characteristic duration of a noise pulse. The noise detecting circuit generates a noise verification pulse in response to a first incoming pulse after a predetermined interval of time following the receipt of the first incoming pulse, which interval is greater than the characteristic duration of a noise pulse and less than the duration of a start pulse. Consequently, there is time coincidence between the noise verification pulse and the first incoming pulse if the first incoming pulse is a start pulse but there is no time coincidence between the noise verification pulse and the first incoming pulse if the first incoming pulse is a noise pulse. Means are included for detecting such non-coincidence and for generating an inhibit signal to indicate that the first incoming pulse is a noise pulse and to inhibit a data processing channel from processing the next incoming pulse.
摘要翻译：用于数据处理通道的噪声检测电路对数据脉冲的输入噪声脉冲和列进行操作，数据脉冲和数据脉冲的序列之前具有基本上大于噪声脉冲的特征持续时间的持续时间的起始脉冲。噪声检测电路在接收到第一输入脉冲之后的预定时间间隔之后响应于第一输入脉冲产生噪声验证脉冲，该间隔大于噪声脉冲的特征持续时间并且小于启动脉冲。因此，如果第一输入脉冲是起始脉冲，则噪声验证脉冲和第一输入脉冲之间存在时间一致，但是如果第一输入脉冲是噪声脉冲，则噪声验证脉冲与第一输入脉冲之间没有时间一致。包括用于检测这种不一致的装置，并且用于产生禁止信号以指示第一输入脉冲是噪声脉冲并且禁止数据处理通道处理下一个输入脉冲。

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