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    • 3. 发明授权
    • Frame timing synchronization method
    • 帧定时同步方法
    • US06754257B1
    • 2004-06-22
    • US09407750
    • 1999-09-28
    • Soichi Tsumura
    • Soichi Tsumura
    • H04B1707
    • H04B1/70751H04B1/70735H04B2201/70707H04J3/0608H04L27/22
    • A frame timing synchronization method of establishing frame synchronization includes the steps of obtaining an integration result, a plurality of number of times, by integrating the square of a complex reception sample from an arbitrary integration start point while shifting an integration range at predetermined intervals, making a search for the maximum integration result from the plurality of integration results, demodulating (despreading) complex reception samples included in a predetermined range having an integration start point as a center corresponding to the maximum integration result while setting the respective samples as demodulation (despreading) start points, and establishing frame synchronization by detecting the portion modulated (spread) by BPSK from the obtained demodulation (despreading) results.
    • 一种建立帧同步的帧定时同步方法包括以下步骤:通过在以任意的积分开始点积分复数接收样本的平方,通过以预定的间隔移位积分范围来获得积分结果多次,使得 搜索来自多个积分结果的最大积分结果,将包含在具有积分开始点的预定范围内的解复用(解扩展)复数接收样本作为与最大积分结果相对应的中心,同时将各个样本设置为解调(解扩) 通过从获得的解调(解扩)结果检测通过BPSK调制(扩展)的部分来建立帧同步。
    • 4. 发明授权
    • Rate matching method
    • 费率匹配法
    • US06580762B1
    • 2003-06-17
    • US09431422
    • 1999-11-01
    • Soichi Tsumura
    • Soichi Tsumura
    • H04L2704
    • H03M13/2792H03M13/23H03M13/2707H03M13/6356H03M13/6362
    • A rate matching method allowing reliable digital communication is disclosed. After setting D=|n−m| and Q=n/D, the input symbol string is sequentially divided to produce D symbol strings each consisting of either Q symbols or (Q+1) symbols so as to arrange the input symbols in an arrangement of columns (C) and rows (R). Then, after selecting a single symbol located at a predetermined position for each of the D symbol strings, the output symbol string is provided by deleting the single symbol for each of the D symbol strings when n>m or repeating the single symbol for each of the D symbol strings when n
    • 公开了一种允许可靠数字通信的速率匹配方法。 设置D = | n-m |后 并且Q = n / D,输入符号串被顺序分割,以产生每个由Q符号或(Q + 1)个符号组成的D个符号串,以便将输入符号排列成列(C)和行( R)。 然后,在为每个D个符号串选择位于预定位置的单个符号之后,当n> m时,通过删除每个D个符号串的单个符号来提供输出符号串,或者为每个符号串重复单个符号 当n
    • 5. 发明授权
    • Method and apparatus using first and second variable gain control
circuits to reduce cross modulation in a radio receiver
    • 使用第一和第二可变增益控制电路以减少无线电接收机中的交叉调制的方法和装置
    • US6044253A
    • 2000-03-28
    • US933631
    • 1997-09-19
    • Soichi Tsumura
    • Soichi Tsumura
    • H03G3/20H03G3/00H03G3/30H04Q7/20
    • H03G3/001H03G3/3068
    • A radio apparatus includes a first variable-gain circuit, a second variable-gain circuit, and a demodulator, wherein a band-pass filter is provided between the first and second variable-gain circuits and the demodulator inputs an output of the second variable-gain circuit. An error occurrence probability is detected from an output of the demodulator and a signal level is detected from the output of the second variable-gain circuit. A received signal strength is estimated from the signal level of the output of the second variable-gain circuit using an aggregate gain from the first variable-gain circuit to the second variable-gain circuit, and then the respective first and second gains of the first and second variable-gain circuits are changed in opposite directions depending on the error occurrence probability and the estimated received signal strength.
    • 无线电设备包括第一可变增益电路,第二可变增益电路和解调器,其中在第一和第二可变增益电路之间提供带通滤波器,并且解调器输入第二可变增益电路的输出, 增益电路。 从解调器的输出检测到错误发生概率,并从第二可变增益电路的输出检测信号电平。 使用从第一可变增益电路到第二可变增益电路的总增益,从第二可变增益电路的输出的信号电平估计接收信号强度,然后第一增益电路的相应第一和第二增益 并且第二可变增益电路根据错误发生概率和估计的接收信号强度在相反方向上改变。
    • 6. 发明授权
    • DQPSK demodulator capable of improving a symbol error rate without
decreasing a transmission rate
    • DQPSK解调器能够在不降低传输速率的情况下改善符号错误率
    • US5550506A
    • 1996-08-27
    • US501478
    • 1995-07-12
    • Soichi Tsumura
    • Soichi Tsumura
    • H04L27/227H04L27/233H03D3/00H04L27/22
    • H04L27/2332
    • A demodulator (20) demodulates a received signal having phase information into a demodulated signal by differential detection. The demodulator comprises a delay section (22-1 to 22-3) which is supplied with an input signal based on a received signal. The delay section delays the input signal to produce first through third delayed signals which have first through third delayed times different from one another. A differential detecting section (23-1, 23-2) carries out differential detection in accordance with the input signal and the first through the third delayed signals to produce first and second output signals. A first correcting section (24) corrects the first delayed signal on the basis of the first output signal to produce a first corrected signal. A second correcting section (25) corrects the second delayed signal on the basis of the second output signal to produce a second corrected signal. A producing section produces the demodulated signal in accordance with the first and the second corrected signals.
    • 解调器(20)通过差分检测将具有相位信息的接收信号解调为解调信号。 解调器包括延迟部分(22-1至22-3),其被提供有基于接收信号的输入信号。 延迟部分延迟输入信号以产生具有彼此不同的第一至第三延迟时间的第一至第三延迟信号。 差分检测部分(23-1,23-2)根据输入信号和第一至第三延迟信号执行差分检测,以产生第一和第二输出信号。 第一校正部分(24)基于第一输出信号校正第一延迟信号以产生第一校正信号。 第二校正部分(25)基于第二输出信号校正第二延迟信号以产生第二校正信号。 产生部分根据第一和第二校正信号产生解调信号。
    • 7. 发明授权
    • CSK communication system
    • CSK通信系统
    • US5132986A
    • 1992-07-21
    • US631921
    • 1990-12-21
    • Kaoru EndoNaomichi TakahashiSoichi Tsumura
    • Kaoru EndoNaomichi TakahashiSoichi Tsumura
    • H04B1/707H04J13/00H04L23/02
    • H04B1/709H04B1/707H04J13/0074H04L23/02
    • The present invention provides new arrangements for various components of a CSK communication system: modulator, correlators, demodulator, carrier detection circuit, and synchronization control circuit. The various improvements provide more accurate demodulation of data from the received signal in the presence of noise and signal deterioration. A modulator configuration permits the CSK system to use two M series codes in which the second code is simply a phase shifted version of the first code. The PN correlators, via shift-registers, efficiently output two correlation signals. The demodulator accepts two correlation signals from the correlators, detects auto-correlation peaks in the correlation signals, and uses the peaks to accurately determine whether the received bit has a value of "1" or "0". The carrier detecting circuit detects the presence of data in the received signal. A carrier detecting circuit conveniently allows demodulation of data without exact synchronization of the center of demodulator's monitoring window to auto-correlation peaks. The synchronization control circuit generates accurate timing pulses that mark the start and end of each data bit. If auto-correlation peaks appear consistently in one location for the duration of N consecutive data bits, subsequent timing pulses are delayed in accordance with weighted averages of the stored locations of auto-correlation peaks. In one embodiment, separate correlation signal monitoring windows for demodulation and synchronization tracking may be set independently of each other, enabling the demodulator to clearly distinguish between an actual auto-correlation peaks and an inter-correlation peak, and the synchronization control circuit to attain stability by "averaging" out temporal effects of noise.
    • 9. 发明申请
    • Mobile communication system, base station, mobile station, and radio communication method used for them
    • 移动通信系统,基站,移动台,无线通信方式
    • US20060058051A1
    • 2006-03-16
    • US10553236
    • 2004-04-16
    • Nahoko TakanoKojiro HamabeSoichi TsumuraMariko Matsumoto
    • Nahoko TakanoKojiro HamabeSoichi TsumuraMariko Matsumoto
    • H04B7/005
    • H04W72/1263H04B7/2681H04W56/00Y02D70/1244Y02D70/449
    • There is provided a mobile communication system capable of reducing the power consumption in the packet wait state and promptly transmitting a packet when data transmission is requested. At a predetermined synchronization establishment interval start time (T1), a base station starts transmission of DPCH (DL) which is a downlink individual channel. A mobile station receives the DPCH (DL) and starts synchronization establishment operation. If the synchronization of the DPCH (DL) is not established by the synchronization establishment interval end time (T2), the synchronization establishment operation is continued. If the base station cannot detect transmission of the DPCH (UL) which is an uplink individual channel from the base station by the synchronization establishment interval end time (T2), the base station continues transmission of the DPCH (DL) to the mobile station and suspends user data transmission in the state update information to the mobile station and DPCH (DL) to the mobile station and control signal transmission to an upper node layer until the DPCH (UL) transmission is detected.
    • 提供了能够降低分组等待状态下的功耗并且在请求数据传输时及时发送分组的移动通信系统。 在预定的同步建立间隔开始时间(T 1)中,基站开始作为下行链路单独信道的DPCH(DL)的发送。 移动站接收DPCH(DL)并开始同步建立操作。 如果DPCH(DL)的同步未由同步建立间隔结束时间(T 2)建立,则继续同步建立操作。 如果基站无法通过同步建立间隔结束时间(T 2)检测来自基站的上行链路单独信道的DPCH(UL)的传输,则基站继续向移动台发送DPCH(DL) 并将状态更新信息中的用户数据传输暂停到移动站和DPCH(DL)到移动站,并且控制信号传输到上层节点层,直到检测到DPCH(UL)传输。