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    • 2. 发明授权
    • Method and apparatus for detecting an IC defect using charged particle
beam
    • 使用带电粒子束检测IC缺陷的方法和装置
    • US5757198A
    • 1998-05-26
    • US641358
    • 1996-04-30
    • Soichi ShidaHiroshi KawamotoHironobu Niijima
    • Soichi ShidaHiroshi KawamotoHironobu Niijima
    • G01R31/28G01R31/307
    • G01R31/307
    • Test patterns are applied to an IC under test under a test pattern address by which the first fail is caused and under other test pattern addresses. A defect candidate area is moved to the position where a charged particle beam can scan the area and defect candidate wiring portions are specified. A potential data of the specified wiring is acquired for each of the test patterns and stored in a memory. This process is performed by sequentially stepping back the stop test pattern addresses. Then, a potential data of the specified wiring in the specified area is similarly acquired for non-defect IC. The respective potential data of the IC under test and the non-defect IC are compared to locate the mismatch test pattern address and wiring.
    • 在测试模式地址下,测试模式被应用到测试模式地址,由此引起第一个故障,并在其他测试模式地址下。 将缺陷候选区域移动到带电粒子束可以扫描该区域的位置,并且指定缺陷候选布线部分。 针对每个测试图案获取指定布线的潜在数据并存储在存储器中。 该过程通过顺序地退回停止测试模式地址来执行。 然后,对于非缺陷IC,类似地获取指定区域中的指定布线的潜在数据。 将待测IC和非缺陷IC的各自的潜在数据进行比较,以确定不匹配测试模式地址和布线。
    • 4. 发明授权
    • Apparatus detecting an IC defect by comparing electron emissions from
two integrated circuits
    • 通过比较来自两个集成电路的电子发射来检测IC缺陷的装置
    • US5821761A
    • 1998-10-13
    • US781836
    • 1997-01-10
    • Soichi ShidaHiroshi KawamotoHironobu Niijima
    • Soichi ShidaHiroshi KawamotoHironobu Niijima
    • G01R31/28G01R31/307
    • G01R31/307
    • Test patterns are applied to an IC under test under a test pattern address by which the first fail is caused and under other test pattern addresses. A defect candidate area is moved to the position where a charged particle beam can scan the area and defect candidate wiring portions are specified. A potential data of the specified wiring is acquired for each of the test patterns and stored in a memory. This process is process performed by sequentially stepping back the stop test pattern addresses. Then, a potential data of the specified wiring in thee specified area is similarly acquired for non-defect IC. The respective potential data of the IC under test and the non-defect IC are compared to locate the mismatch test pattern address and wiring.
    • 在测试模式地址下,测试模式被应用到测试模式地址,由此引起第一个故障,并在其他测试模式地址下。 将缺陷候选区域移动到带电粒子束可以扫描该区域的位置,并且指定缺陷候选布线部分。 针对每个测试图案获取指定布线的潜在数据并存储在存储器中。 该过程是通过顺序地退回停止测试模式地址来执行的。 然后,对于非缺陷IC,类似地获取指定区域中的指定布线的电位数据。 将待测IC和非缺陷IC的各自的潜在数据进行比较,以确定不匹配测试模式地址和布线。
    • 5. 发明授权
    • Method for detecting an IC defect using charged particle beam
    • 使用带电粒子束检测IC缺陷的方法
    • US5592100A
    • 1997-01-07
    • US640439
    • 1996-04-30
    • Soichi ShidaHiroshi KawamotoHironobu Niijima
    • Soichi ShidaHiroshi KawamotoHironobu Niijima
    • G01R31/28G01R31/307
    • G01R31/307
    • Test patterns are applied to an IC under test under a test pattern address by which the first fail is caused and under other test pattern addresses. A defect candidate area is moved to the position where a charged particle beam can scan the area and defect candidate wiring portions are specified. A potential data of the specified wiring is acquired for each of the test patterns and stored in a memory. This process is performed by sequentially stepping back the stop test pattern addresses. Then, a potential data of the specified wiring in the specified area is similarly acquired for non-defect IC. The respective potential data of the IC under test and the non-defect IC are compared to locate the mismatch test pattern address and wiring.
    • 在测试模式地址下,测试模式被应用到测试模式地址,由此引起第一个故障,并在其他测试模式地址下。 将缺陷候选区域移动到带电粒子束可以扫描该区域的位置,并且指定缺陷候选布线部分。 针对每个测试图案获取指定布线的潜在数据并存储在存储器中。 该过程通过顺序地退回停止测试模式地址来执行。 然后,对于非缺陷IC,类似地获取指定区域中的指定布线的潜在数据。 将待测IC和非缺陷IC的各自的潜在数据进行比较,以确定不匹配测试模式地址和布线。
    • 6. 发明授权
    • Pattern inspection apparatus and method
    • 图案检验装置及方法
    • US08809778B2
    • 2014-08-19
    • US13616596
    • 2012-09-14
    • Ryuichi OginoSoichi ShidaYoshiaki Ogiso
    • Ryuichi OginoSoichi ShidaYoshiaki Ogiso
    • H01J37/28
    • H01J37/28H01J37/222H01J2237/24578H01J2237/2826
    • A pattern inspection apparatus configured to perform pattern inspection based on a SEM image previously measures distortion amount data representing a magnitude distribution of positional displacement caused by distortion of the SEM image in a scanning direction. When the pattern inspection is performed, the apparatus makes design data and the SEM image correspond to each other by adjusting at least one of the design data and the SEM image on the basis of the distortion amount data, and places a measurement region on the SEM image on the basis of a correspondence between the design data and the SEM image. The apparatus may further find a matching rate between a pattern of the design data and a pattern of the SEM image.
    • 配置为基于SEM图像执行图案检查的图案检查装置预先测量表示由扫描方向上的SEM图像的变形引起的位移的幅度分布的失真量数据。 当进行图案检查时,通过基于失真量数据调整设计数据和SEM图像中的至少一个,使设备数据和SEM图像彼此对应,并将测量区域放置在SEM 基于设计数据和SEM图像之间的对应关系图像。 该装置还可以找到设计数据的图案和SEM图像的图案之间的匹配率。
    • 8. 发明授权
    • Method and apparatus for detecting an IC defect using a charged particle
beam
    • 使用带电粒子束检测IC缺陷的方法和装置
    • US5521517A
    • 1996-05-28
    • US500059
    • 1995-07-10
    • Soichi ShidaHironobu NiijimaHiroshi Kawamoto
    • Soichi ShidaHironobu NiijimaHiroshi Kawamoto
    • G01R31/302G01R31/307H01J37/26H01L21/66G01R31/26
    • H01J37/268G01R31/307
    • The present invention allows to automatically presume a defect location of an IC using an EB tester. Under each of the conditions where a normal power supply voltage and an abnormal power supply voltage are applied to an IC respectively, test patterns are applied to the IC until the pattern address where the first defect is detected by an IC tester. At this point in time, the pattern update is stopped. Then a potential contrast image data is acquired from one of the partitioned segments of the IC surface for each of the above power supply conditions. A diffrence image data between the two potential contrast image data (normal power case and abnormal power case) is generated. This difference image data generation is repeated several times and those defference image data are summed up. A check is made to see if there is a changed portion greater than a predetermined value in each of the segments and if there is, a defect information is stored in a storage portion corresponding to the defect segment. The summed difference image data is acquired from each of all the segments of the IC and then the stop pattern address is decrementsd by one and the same process is repeated. Above process is repeated until no defect segment is detected by decrementing the number of test patterns. When only one segment having a defect is detected, the segment is considered as a real defect segment.
    • 本发明允许使用EB测试器自动设定IC的缺陷位置。 在分别向IC施加正常电源电压和异常电源电压的每个条件下,将测试图案施加到IC,直到由IC测试仪检测到第一缺陷的图案地址。 在这个时间点,模式更新被停止。 然后,对于上述每个电源条件,从IC表面的一个分割段获取潜在的对比度图像数据。 产生两个潜在对比度图像数据(正常功率情况和异常功率情况)之间的差异图像数据。 将该差分图像数据生成重复多次,并将这些差异图像数据相加。 检查每个段中是否存在大于预定值的改变部分,并且如果存在缺陷信息,则存储在与缺陷段对应的存储部分中。 从IC的所有段中的每一个获取相加的差分图像数据,然后停止模式地址递减1并重复相同的处理。 重复上述过程,直到通过递减测试图案的数量来检测到缺陷段。 当仅检测到具有缺陷的一个段时,该段被认为是实际缺陷段。