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1. 发明授权

US08698202B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US08698202B2
公开(公告)日：2014-04-15
申请号：US13278798
申请日：2011-10-21
申请人： Masahiro Mitsunaga , Shinichi Tamari , Yuji Ibusuki
发明人： Masahiro Mitsunaga , Shinichi Tamari , Yuji Ibusuki
IPC分类号： H01L29/66
CPC分类号： H01L27/085 , H01L27/0605 , H01L29/66462 , H01L29/7785 , H01L29/802
摘要： A semiconductor device including at least a p-channel field-effect transistor region formed above a compound semiconductor substrate. The p-channel field-effect transistor region includes an undoped buffer layer; a p-type channel layer formed in contact with the buffer layer; a p-type source region and a p-type drain region formed in the channel layer, being separated with each other; and an n-type gate region formed above the channel layer and between the source region and the drain region. The buffer layer is formed having either a multilayer structure including a hole diffusion control layer with a band gap larger than the channel layer, or a single layer structure including only the hole diffusion control layer.
摘要翻译：一种半导体器件，包括至少形成在化合物半导体衬底上的p沟道场效应晶体管区域。 p沟道场效应晶体管区域包括未掺杂的缓冲层; 形成为与缓冲层接触的p型沟道层; 形成在沟道层中的p型源极区和p型漏极区彼此分离; 以及形成在沟道层上方且在源极区域和漏极区域之间的n型栅极区域。缓冲层形成为具有包括带隙大于沟道层的空穴扩散控制层的多层结构，或仅包括孔扩散控制层的单层结构。

2. 发明授权

US08575658B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08575658B2
公开(公告)日：2013-11-05
申请号：US13538583
申请日：2012-06-29
申请人： Shinichi Tamari , Mitsuhiro Nakamura , Koji Wakizono , Tomoya Nishida , Yuji Ibusuki
发明人： Shinichi Tamari , Mitsuhiro Nakamura , Koji Wakizono , Tomoya Nishida , Yuji Ibusuki
IPC分类号： H01L29/80
CPC分类号： H01L29/7787 , H01L21/8252 , H01L27/0605 , H01L27/098 , H01L29/205 , H01L29/66462
摘要： A semiconductor device includes a compound semiconductor substrate; a first conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; a first conductivity type first barrier layer that forms a heterojunction with the first channel layer, and supplies a first conductivity type charge to the first channel layer; and a second conductivity type gate region that has a pn junction-type potential barrier against the first conductivity type first barrier layer; and a second conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a second conductivity type second channel layer, and a first conductivity type gate region that has a pn junction-type potential barrier against the second conductivity type second channel layer.
摘要翻译：半导体器件包括化合物半导体衬底; 形成在所述化合物半导体衬底上的第一导电型沟道场效应晶体管区，并且包括第一沟道层; 第一导电型第一阻挡层，与第一沟道层形成异质结，并向第一沟道层提供第一导电型电荷; 以及对所述第一导电型第一阻挡层具有pn结型势垒的第二导电型栅极区; 以及形成在所述化合物半导体衬底上并且包括第二导电类型的第二沟道层的第二导电类型沟道场效应晶体管区域和具有抵抗第二导电性的pn结型势垒的第一导电型栅极区键入第二通道层。

3. 发明授权

US08466494B2 Field effect transistor, semiconductor switch circuit, and communication apparatus 有权
标题翻译：场效应晶体管，半导体开关电路和通信装置
公开(公告)号：US08466494B2
公开(公告)日：2013-06-18
申请号：US13396127
申请日：2012-02-14
申请人： Shinichi Tamari
发明人： Shinichi Tamari
IPC分类号： H01L29/778
CPC分类号： H01L29/7783 , H01L29/0696 , H01L29/1066 , H01L29/205 , H01L29/42316 , H03K17/693 , H04B1/006
摘要： A field effect transistor includes a source wiring that is formed on a compound semiconductor substrate, and has a plurality of source electrodes arranged in parallel to each other at predetermined intervals, a drain wiring that is formed on the compound semiconductor substrate, and has a plurality of drain electrodes arranged in parallel to each other at predetermined intervals and alternatively disposed in a parallel direction of the plurality of source electrodes, a gate wiring that is formed on the compound semiconductor substrate, and has a portion located between the source electrode and the drain electrode which are adjacent to each other at least in the parallel direction, and a plurality of buried gate layers that is formed under the gate wiring in a region in which the gate wiring is formed, and is independently provided between each electrode of the source electrodes and the drain electrodes.
摘要翻译：场效应晶体管包括形成在化合物半导体衬底上的源极布线，并且具有以预定间隔彼此平行排列的多个源电极，形成在化合物半导体衬底上的多个源电极，并具有多个的漏电极以预定间隔彼此平行布置，并且可选地设置在所述多个源电极的平行方向上;栅极布线，其形成在所述化合物半导体基板上，并且具有位于所述源电极和所述漏极电极，其至少在平行方向上彼此相邻;以及多个掩埋栅极层，形成在栅极布线下方的栅极布线形成的区域中，并且独立地设置在源电极的每个电极之间和漏电极。

4. 发明申请

US20110024798A1 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20110024798A1
公开(公告)日：2011-02-03
申请号：US12805160
申请日：2010-07-15
申请人： Shinichi Tamari , Mitsuhiro Nakamura , Koji Wakizono , Tomoya Nishida , Yuji Ibusuki
发明人： Shinichi Tamari , Mitsuhiro Nakamura , Koji Wakizono , Tomoya Nishida , Yuji Ibusuki
IPC分类号： H01L27/085 , H01L21/8238 , H01L21/335 , H01L29/778
CPC分类号： H01L29/7787 , H01L21/8252 , H01L27/0605 , H01L27/098 , H01L29/205 , H01L29/66462
摘要： A semiconductor device includes: a compound semiconductor substrate; an n-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; an n-type first barrier layer that forms a heterojunction with the first channel layer, and supplies an n-type charge to the first channel layer; and a p-type gate region that has a pn junction-type potential barrier against the n-type first barrier layer; and a p-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a p-type second channel layer, and an n-type gate region that has a pn junction-type potential barrier against the p-type second channel layer.
摘要翻译：半导体器件包括：化合物半导体衬底; 形成在所述化合物半导体衬底上并且包括第一沟道层的n沟道场效应晶体管区; n型第一阻挡层，与第一沟道层形成异质结，并向第一沟道层提供n型电荷; 以及对n型第一阻挡层具有pn结型势垒的p型栅极区域; 以及形成在化合物半导体衬底上的p沟道场效应晶体管区，并且包括p型第二沟道层和对p型第二沟道pn结型势垒的n型栅极区通道层。

5. 发明申请

US20120211802A1 FIELD EFFECT TRANSISTOR, SEMICONDUCTOR SWITCH CIRCUIT, AND COMMUNICATION APPARATUS 有权
标题翻译：场效应晶体管，半导体开关电路和通信装置
公开(公告)号：US20120211802A1
公开(公告)日：2012-08-23
申请号：US13396127
申请日：2012-02-14
申请人： Shinichi Tamari
发明人： Shinichi Tamari
IPC分类号： H01L29/778
CPC分类号： H01L29/7783 , H01L29/0696 , H01L29/1066 , H01L29/205 , H01L29/42316 , H03K17/693 , H04B1/006
摘要： A field effect transistor includes a source wiring that is formed on a compound semiconductor substrate, and has a plurality of source electrodes arranged in parallel to each other at predetermined intervals, a drain wiring that is formed on the compound semiconductor substrate, and has a plurality of drain electrodes arranged in parallel to each other at predetermined intervals and alternatively disposed in a parallel direction of the plurality of source electrodes, a gate wiring that is formed on the compound semiconductor substrate, and has a portion located between the source electrode and the drain electrode which are adjacent to each other at least in the parallel direction, and a plurality of buried gate layers that is formed under the gate wiring in a region in which the gate wiring is formed, and is independently provided between each electrode of the source electrodes and the drain electrodes.
摘要翻译：场效应晶体管包括形成在化合物半导体衬底上的源极布线，并且具有以预定间隔彼此平行排列的多个源电极，形成在化合物半导体衬底上的多个源电极，并具有多个的漏电极以预定间隔彼此平行布置，并且可选地设置在所述多个源电极的平行方向上;栅极布线，其形成在所述化合物半导体基板上，并且具有位于所述源电极和所述漏极电极，其至少在平行方向上彼此相邻;以及多个掩埋栅极层，形成在栅极布线下方的栅极布线形成的区域中，并且独立地设置在源电极的每个电极之间和漏电极。

6. 发明授权

US08378389B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08378389B2
公开(公告)日：2013-02-19
申请号：US12805160
申请日：2010-07-15
申请人： Shinichi Tamari , Mitsuhiro Nakamura , Koji Wakizono , Tomoya Nishida , Yuji Ibusuki
发明人： Shinichi Tamari , Mitsuhiro Nakamura , Koji Wakizono , Tomoya Nishida , Yuji Ibusuki
IPC分类号： H01L29/80
CPC分类号： H01L29/7787 , H01L21/8252 , H01L27/0605 , H01L27/098 , H01L29/205 , H01L29/66462
摘要： A semiconductor device includes: a compound semiconductor substrate; an n-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; an n-type first barrier layer that forms a heterojunction with the first channel layer, and supplies an n-type charge to the first channel layer; and a p-type gate region that has a pn junction-type potential barrier against the n-type first barrier layer; and a p-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a p-type second channel layer, and an n-type gate region that has a pn junction-type potential barrier against the p-type second channel layer.
摘要翻译：半导体器件包括：化合物半导体衬底; 形成在所述化合物半导体衬底上并且包括第一沟道层的n沟道场效应晶体管区; n型第一阻挡层，与第一沟道层形成异质结，并向第一沟道层提供n型电荷; 以及对n型第一阻挡层具有pn结型势垒的p型栅极区域; 以及形成在化合物半导体衬底上的p沟道场效应晶体管区，并且包括p型第二沟道层和对p型第二沟道pn结型势垒的n型栅极区通道层。

7. 发明申请

US20120267684A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120267684A1
公开(公告)日：2012-10-25
申请号：US13538583
申请日：2012-06-29
申请人： SHINICHI TAMARI , MITSUHIRO NAKAMURA , KOJI WAKIZONO , TOMOYA NISHIDA , YUJI IBUSUKI
发明人： SHINICHI TAMARI , MITSUHIRO NAKAMURA , KOJI WAKIZONO , TOMOYA NISHIDA , YUJI IBUSUKI
IPC分类号： H01L27/085 , H01L21/8232
CPC分类号： H01L29/7787 , H01L21/8252 , H01L27/0605 , H01L27/098 , H01L29/205 , H01L29/66462
摘要： A semiconductor device includes a compound semiconductor substrate; a first conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a first channel layer; a first conductivity type first barrier layer that forms a heterojunction with the first channel layer, and supplies a first conductivity type charge to the first channel layer; and a second conductivity type gate region that has a pn junction-type potential barrier against the first conductivity type first barrier layer; and a second conductivity type-channel field-effect transistor region formed on the compound semiconductor substrate, and that includes a second conductivity type second channel layer, and a first conductivity type gate region that has a pn junction-type potential barrier against the second conductivity type second channel layer.
摘要翻译：半导体器件包括化合物半导体衬底; 形成在所述化合物半导体衬底上的第一导电型沟道场效应晶体管区，并且包括第一沟道层; 第一导电型第一阻挡层，与第一沟道层形成异质结，并向第一沟道层提供第一导电型电荷; 以及对所述第一导电型第一阻挡层具有pn结型势垒的第二导电型栅极区; 以及形成在所述化合物半导体衬底上并且包括第二导电类型的第二沟道层的第二导电类型沟道场效应晶体管区域和具有针对所述第二导电性的pn结型势垒的第一导电型栅极区键入第二通道层。

8. 发明申请

US20120126291A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20120126291A1
公开(公告)日：2012-05-24
申请号：US13278798
申请日：2011-10-21
申请人： Masahiro Mitsunaga , Shinichi Tamari , Yuji Ibusuki
发明人： Masahiro Mitsunaga , Shinichi Tamari , Yuji Ibusuki
IPC分类号： H01L27/092
CPC分类号： H01L27/085 , H01L27/0605 , H01L29/66462 , H01L29/7785 , H01L29/802
摘要： A semiconductor device including at least a p-channel field-effect transistor region formed above a compound semiconductor substrate. The p-channel field-effect transistor region includes an undoped buffer layer; a p-type channel layer formed in contact with the buffer layer; a p-type source region and a p-type drain region formed in the channel layer, being separated with each other; and an n-type gate region formed above the channel layer and between the source region and the drain region. The buffer layer is formed having either a multilayer structure including a hole diffusion control layer with a band gap larger than the channel layer, or a single layer structure including only the hole diffusion control layer.
摘要翻译：一种半导体器件，包括至少形成在化合物半导体衬底上的p沟道场效应晶体管区域。 p沟道场效应晶体管区域包括未掺杂的缓冲层; 形成为与缓冲层接触的p型沟道层; 形成在沟道层中的p型源极区和p型漏极区彼此分离; 以及形成在沟道层上方且在源极区域和漏极区域之间的n型栅极区域。缓冲层形成为具有包括带隙大于沟道层的空穴扩散控制层的多层结构，或仅包括孔扩散控制层的单层结构。

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