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1. 发明授权

US07273787B2 Method for manufacturing gate dielectric layer 有权
标题翻译：栅介质层制造方法
公开(公告)号：US07273787B2
公开(公告)日：2007-09-25
申请号：US11164332
申请日：2005-11-18
申请人： Wen-Ji Chen , Tung-Po Chen , Kai-An Hsueh , Sheng-Hone Zheng
发明人： Wen-Ji Chen , Tung-Po Chen , Kai-An Hsueh , Sheng-Hone Zheng
IPC分类号： H01L21/8234
CPC分类号： H01L27/105 , H01L21/76229 , H01L21/823462 , H01L21/823481 , H01L27/11546 , Y10S438/981
摘要： A method for manufacturing a gate dielectric layer is provided. A substrate divided into at least a high voltage circuit region and a low voltage circuit region is provided. A first dielectric layer serving as gate dielectric layer in the high voltage circuit region is formed on the substrate. A mask layer is formed over the first dielectric layer. The mask layer, the first dielectric layer and the substrate are patterned to form trenches in the substrate. An isolation layer is formed to fill the trenches. The mask layer and part of the isolation layer are removed to expose the surface of the first dielectric layer. The first dielectric layer of the low voltage circuit region is removed to expose the surface of the substrate. A second dielectric layer having a thickness smaller than the first dielectric layer is formed on the substrate in the low voltage circuit region.
摘要翻译：提供一种用于制造栅介质层的方法。提供了分成至少高压电路区域和低电压电路区域的衬底。在基板上形成用作高电压电路区域中的栅极电介质层的第一介质层。在第一电介质层上形成掩模层。将掩模层，第一介电层和衬底图案化以在衬底中形成沟槽。形成隔离层以填充沟槽。去除掩模层和隔离层的一部分以露出第一介电层的表面。去除低电压电路区域的第一电介质层以暴露衬底的表面。在低电压电路区域的基板上形成厚度小于第一电介质层的第二电介质层。

2. 发明申请

US20060281251A1 METHOD FOR MANUFACTURING GATE DIELECTRIC LAYER 有权
标题翻译：制造门电介质层的方法
公开(公告)号：US20060281251A1
公开(公告)日：2006-12-14
申请号：US11164332
申请日：2005-11-18
申请人： Wen-Ji Chen , Tung-Po Chen , Kai-An Hsueh , Sheng-Hone Zheng
发明人： Wen-Ji Chen , Tung-Po Chen , Kai-An Hsueh , Sheng-Hone Zheng
IPC分类号： H01L21/8242
CPC分类号： H01L27/105 , H01L21/76229 , H01L21/823462 , H01L21/823481 , H01L27/11546 , Y10S438/981
摘要： A method for manufacturing a gate dielectric layer is provided. A substrate divided into at least a high voltage circuit region and a low voltage circuit region is provided. A first dielectric layer serving as gate dielectric layer in the high voltage circuit region is formed on the substrate. A mask layer is formed over the first dielectric layer. The mask layer, the first dielectric layer and the substrate are patterned to form trenches in the substrate. An isolation layer is formed to fill the trenches. The mask layer and part of the isolation layer are removed to expose the surface of the first dielectric layer. The first dielectric layer of the low voltage circuit region is removed to expose the surface of the substrate. A second dielectric layer having a thickness smaller than the first dielectric layer is formed on the substrate in the low voltage circuit region.
摘要翻译：提供一种用于制造栅介质层的方法。提供了分成至少高压电路区域和低电压电路区域的衬底。在基板上形成用作高电压电路区域中的栅极电介质层的第一介质层。在第一电介质层上形成掩模层。将掩模层，第一介电层和衬底图案化以在衬底中形成沟槽。形成隔离层以填充沟槽。去除掩模层和隔离层的一部分以露出第一介电层的表面。去除低电压电路区域的第一电介质层以暴露衬底的表面。在低电压电路区域的基板上形成厚度小于第一电介质层的第二电介质层。

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