专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07037826B2 Method for forming semiconductor device bonding pads 失效
标题翻译：用于形成半导体器件接合焊盘的方法
公开(公告)号：US07037826B2
公开(公告)日：2006-05-02
申请号：US10747603
申请日：2003-12-29
申请人： Seung Jong Yoo
发明人： Seung Jong Yoo
IPC分类号： H01L21/4763
CPC分类号： H01L24/05 , H01L23/3171 , H01L24/03 , H01L2224/04042 , H01L2224/05001 , H01L2224/05073 , H01L2224/05184 , H01L2224/05548 , H01L2224/05624 , H01L2224/05647 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01043 , H01L2924/01074 , H01L2924/01078 , H01L2924/05042 , H01L2924/00014
摘要： A method of forming a bonding pad of a semiconductor device is disclosed. An example method forms a first insulating layer over a semiconductor substrate, forms a trench by removing some part of the first insulating layer, forms a top metal interconnect in the trench, forms a second insulating layer over the substrate including the top metal interconnect, and forms a contact hole by removing some part of the second insulating layer, the contact hole exposing a portion of the top metal interconnect. In addition, the example method forms a metal layer on the surface of the second insulating layer and the sidewalls and bottom of the contact hole, forms a metal pad by removing some parts of the metal layer, forms a third insulating layer over the second insulating layer and the metal pad, and exposes the metal pad on the second insulating layer by removing some part of the third insulating layer.
摘要翻译：公开了一种形成半导体器件的接合焊盘的方法。示例性方法在半导体衬底上形成第一绝缘层，通过去除第一绝缘层的一部分形成沟槽，在沟槽中形成顶部金属互连，在包括顶部金属互连的衬底上形成第二绝缘层，以及通过去除第二绝缘层的一部分形成接触孔，该接触孔暴露顶部金属互连的一部分。此外，示例性方法在第二绝缘层的表面和接触孔的侧壁和底部上形成金属层，通过去除金属层的一些部分形成金属焊盘，在第二绝缘层上形成第三绝缘层层和金属焊盘，并且通过去除第三绝缘层的一部分来将金属焊盘暴露在第二绝缘层上。

2. 发明授权

US06873292B2 Surface mounted type chip antenna for improving signal interfix and mobile communication apparatus using the same 失效
标题翻译：表面贴装式芯片天线，用于改善信号接口和使用其的移动通信装置
公开(公告)号：US06873292B2
公开(公告)日：2005-03-29
申请号：US10328046
申请日：2002-12-26
申请人： Seung Jong Yoo , Jae Suk Sung
发明人： Seung Jong Yoo , Jae Suk Sung
IPC分类号： H01Q13/08 , H01Q1/24 , H01Q1/38 , H01Q9/04 , H01Q9/40
CPC分类号： H01Q9/0421 , H01Q1/243 , H01Q1/38
摘要： A surface mounted type chip antenna comprises: a body including an upper surface, a lower surface, and four side surfaces; a feeding pad formed on the lower surface and the first side surface of the body; a radiation electrode formed on the upper surface of the body and electrically connected to the feeding pad; a short bar formed on the third side surface being opposite to the first side surface and connected to the radiation electrode; and a ground electrode formed on the lower surface of the body, spaced apart from the feeding pad, and connected to the short bar. When the antenna is installed in a mobile communication apparatus, a location where a maximum current is generated is remote from circuitry of the PCB of the mobile apparatus.
摘要翻译：表面安装型芯片天线包括：主体，包括上表面，下表面和四个侧表面; 形成在所述主体的下表面和所述第一侧表面上的供给垫; 辐射电极，其形成在所述主体的上表面上并电连接到所述馈电垫; 在所述第三侧表面上形成与所述第一侧表面相对并连接到所述辐射电极的短条; 以及形成在本体的下表面上的与馈电垫隔开并且连接到短条的接地电极。当天线安装在移动通信设备中时，产生最大电流的位置远离移动设备的PCB的电路。

3. 发明授权

US07105455B2 Method for fabricating nonvolatile memory device 失效
标题翻译：非易失性存储器件的制造方法
公开(公告)号：US07105455B2
公开(公告)日：2006-09-12
申请号：US10749843
申请日：2003-12-31
申请人： Seung Jong Yoo
发明人： Seung Jong Yoo
IPC分类号： H01L21/302
CPC分类号： H01L21/28273
摘要： A method of fabricating a nonvolatile memory device is disclosed. First, a lower insulating layer and a sacrificial layer are formed in sequence on a substrate. Then, a sacrificial layer pattern is formed through removing some part of the sacrificial layer by an etching process to expose some part of the lower insulating layer. At the same time, spacers are formed on sidewalls of the sacrificial layer pattern. The spacers are formed of polymers resulting from the etching of the sacrificial layer. The exposed lower insulating layer is removed to form a lower insulating layer pattern. Next, the sacrificial layer pattern and the spacers are removed. Accordingly, linewidth of a tunnel window which defined by the insulating layer pattern becomes narrow.
摘要翻译：公开了一种制造非易失性存储器件的方法。首先，在基板上依次形成下绝缘层和牺牲层。然后，通过通过蚀刻工艺去除一部分牺牲层来形成牺牲层图案以暴露下部绝缘层的一部分。同时，在牺牲层图案的侧壁上形成间隔物。间隔物由蚀刻牺牲层产生的聚合物形成。去除暴露的下绝缘层以形成较低的绝缘层图案。接下来，除去牺牲层图案和间隔物。因此，由绝缘层图案限定的隧道窗的线宽变窄。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式