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1. 发明授权

US07749834B2 Method of fabricating semiconductor devices having buried contact plugs 有权
标题翻译：制造具有埋入式接触塞的半导体器件的方法
公开(公告)号：US07749834B2
公开(公告)日：2010-07-06
申请号：US11364635
申请日：2006-02-27
申请人： Je-Min Park , Yoo-Sang Hwang , Seok-Soon Song
发明人： Je-Min Park , Yoo-Sang Hwang , Seok-Soon Song
IPC分类号： H01L21/8242
CPC分类号： H01L27/10855 , H01L27/10817
摘要： A method includes forming a lower dielectric layer on a semiconductor substrate, forming a bit line landing pad and a storage landing pad that penetrate the lower dielectric layer, covering the lower dielectric layer, the bit line landing pad, and the storage landing pad with an intermediate dielectric layer, forming an upper dielectric layer on the intermediate dielectric layer, partially removing the upper dielectric layer and the intermediate dielectric layer to form a contact opening that exposes the storage landing pad and a portion of the lower dielectric layer, forming a contact spacer on an inner wall of the contact opening, and filling the contact opening with a contact plug, a top surface of the contact plug larger than a surface of the contact plug that is in contact with the storage landing pad, the top surface of the contact plug eccentric in relation to the storage landing pad.
摘要翻译：一种方法包括在半导体衬底上形成下电介质层，形成位线着陆焊盘和穿透下电介质层的存储着陆焊盘，覆盖下电介质层，位线着陆焊盘和存储着陆焊盘中间介电层，在中间介电层上形成上电介质层，部分地去除上电介质层和中间电介质层，以形成暴露存储着陆焊盘和下电介质层的一部分的接触开口，形成接触间隔物在接触开口的内壁上，并用接触塞填充接触开口，接触插塞的顶表面大于接触插塞的与储存着陆垫接触的表面，触头顶表面相对于存储着陆垫插头偏心。

2. 发明申请

US20060205141A1 Method of fabricating semiconductor devices having buried contact plugs 有权
标题翻译：制造具有埋入式接触塞的半导体器件的方法
公开(公告)号：US20060205141A1
公开(公告)日：2006-09-14
申请号：US11364635
申请日：2006-02-27
申请人： Je-Min Park , Yoo-Sang Hwang , Seok-Soon Song
发明人： Je-Min Park , Yoo-Sang Hwang , Seok-Soon Song
IPC分类号： H01L21/8242
CPC分类号： H01L27/10855 , H01L27/10817
摘要： A method includes forming a lower dielectric layer on a semiconductor substrate, forming a bit line landing pad and a storage landing pad that penetrate the lower dielectric layer, covering the lower dielectric layer, the bit line landing pad, and the storage landing pad with an intermediate dielectric layer, forming an upper dielectric layer on the intermediate dielectric layer, partially removing the upper dielectric layer and the intermediate dielectric layer to form a contact opening that exposes the storage landing pad and a portion of the lower dielectric layer, forming a contact spacer on an inner wall of the contact opening, and filling the contact opening with a contact plug, a top surface of the contact plug larger than a surface of the contact plug that is in contact with the storage landing pad, the top surface of the contact plug eccentric in relation to the storage landing pad.
摘要翻译：一种方法包括在半导体衬底上形成下电介质层，形成位线着陆焊盘和穿透下电介质层的存储着陆焊盘，覆盖下电介质层，位线着陆焊盘和存储着陆焊盘中间介电层，在中间介电层上形成上电介质层，部分地去除上电介质层和中间电介质层，以形成暴露存储着陆焊盘和下电介质层的一部分的接触开口，形成接触间隔物在接触开口的内壁上，并用接触塞填充接触开口，接触插塞的顶表面大于接触插塞的与储存着陆垫接触的表面，触头顶表面相对于存储着陆垫插头偏心。

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