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1. 发明申请

US20060113057A1 Metal filling process and metal filling apparatus 审中-公开
标题翻译：金属灌装工艺和金属灌装设备
公开(公告)号：US20060113057A1
公开(公告)日：2006-06-01
申请号：US11333345
申请日：2006-01-18
申请人： Sayaka Hirafune , Tatsuo Suemasu
发明人： Sayaka Hirafune , Tatsuo Suemasu
IPC分类号： B22D37/00 , B22D41/00
CPC分类号： C23C2/34 , C23C2/00 , H01L21/76898 , H05K3/4038 , H05K2203/0285 , H05K2203/128 , H05K2203/1527
摘要： A metal filling process is provided in which micro holes formed in a work piece are filled with metal by immersing the work piece in molten metal and then removing the work piece from the molten metal. As the work piece is dipped into molten metal, a bottom surface of the work piece is tilted to an angle of 0.5° or more relative to the surface of the molten metal, and as the work piece is removed from the molten metal, a top surface of the work piece is tilted to an angle of 0.5° or more and less than 85° relative to the surface of the molten metal. Failures such as a work piece fracturing when it is dipped into molten metal, or when it is removed from molten metal, are prevented, and failures such as metal remaining on a surface of a work piece after the work piece has been removed from molten metal are also prevented.
摘要翻译：提供一种金属填充工艺，其中通过将工件浸入熔融金属中然后从熔融金属中去除工件，在工件中形成的微孔被金属填充。当工件浸入熔融金属中时，工件的底面相对于熔融金属的表面倾斜0.5°或更大的角度，当工件从熔融金属中取出时，顶部工件的表面相对于熔融金属的表面倾斜至0.5°以上且小于85°的角度。防止在将其浸入熔融金属中时工件断裂或者从熔融金属中除去时的失效，并且在工件从熔融金属中除去后残留在工件表面上的金属等故障也被阻止。

2. 发明申请

US20100117220A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD FOR THE SAME 审中-公开
标题翻译：半导体封装及其制造方法
公开(公告)号：US20100117220A1
公开(公告)日：2010-05-13
申请号：US12688563
申请日：2010-01-15
申请人： Sayaka HIRAFUNE , Tatsuo SUEMASU
发明人： Sayaka HIRAFUNE , Tatsuo SUEMASU
IPC分类号： H01L23/31 , H01L21/56
CPC分类号： H01L27/14618 , H01L23/10 , H01L31/0203 , H01L2924/0002 , H01L2924/16195 , H04N5/2253 , H01L2924/00
摘要： A semiconductor package includes at least: a workpiece at least one surface of which is equipped with a device; a wall portion provided along an outer circumference of the device and is spaced apart from the device; and a cover member that is arranged above the device so as to form a first space and is supported by the workpiece via the wall portion, in which the first space includes at least one second space that communicates with an external space.
摘要翻译：半导体封装至少包括：其至少一个表面装备有器件的工件; 沿所述装置的外周设置并与所述装置间隔开的壁部; 以及盖构件，其设置在所述装置的上方，以便形成第一空间，并且经由所述壁部被所述工件支撑，所述第一空间包括与外部空间连通的至少一个第二空间。

3. 发明授权

US07368321B2 Semiconductor package and method for manufacturing the same 失效
标题翻译：半导体封装及其制造方法
公开(公告)号：US07368321B2
公开(公告)日：2008-05-06
申请号：US11828699
申请日：2007-07-26
申请人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
发明人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
IPC分类号： H01L21/00
CPC分类号： H01L27/14618 , H01L31/0203 , H01L2224/94
摘要： A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.
摘要翻译：半导体封装包括：第一基板，包括：具有第一侧和第二侧的半导体基体材料; 设置在所述半导体基材的第一侧的功能元件; 第一布线通过所述第一布线电连接到所述功能元件的焊盘; 通孔互连，其电连接到所述焊盘，并且设置在从所述半导体基材的第一侧至其第二侧贯通的孔中，所述通孔互连包括第一绝缘膜和第一绝缘膜形成在第一绝缘膜上的导电材料; 以及围绕所述功能元件设置的密封材料; 经由密封材料结合到第一基板的第一侧的第二基板。

4. 发明申请

US20050056903A1 Semiconductor package and method of manufacturing same 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US20050056903A1
公开(公告)日：2005-03-17
申请号：US10924205
申请日：2004-08-24
申请人： Satoshi Yamamoto , Tatsuo Suemasu , Sayaka Hirafune , Toshihiko Isokawa , Koichi Shiotani , Kazuya Matsumoto
发明人： Satoshi Yamamoto , Tatsuo Suemasu , Sayaka Hirafune , Toshihiko Isokawa , Koichi Shiotani , Kazuya Matsumoto
IPC分类号： H01L23/12 , H01L23/48 , H01L23/538 , H01L25/065 , H01L29/76
CPC分类号： H01L24/94 , H01L21/76898 , H01L23/481 , H01L23/5389 , H01L24/48 , H01L25/0652 , H01L25/0657 , H01L27/14618 , H01L27/14632 , H01L27/14687 , H01L2224/02372 , H01L2224/0401 , H01L2224/13024 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2225/06524 , H01L2225/06541 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01067 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04953 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15788 , H01L2924/16195 , H01L2924/3025 , H01L2924/00 , H01L2224/45099
摘要： A semiconductor package of the invention comprises: a semiconductor element provided with a circuit element on one surface of a semiconductor substrate; an external wiring region provided on an other surface of the semiconductor substrate; a support substrate disposed on the one surface of the semiconductor substrate; an electrode pad disposed on the one surface of the semiconductor substrate; and a through-electrode which extends from the electrode pad through to the other surface of the semiconductor substrate.
摘要翻译：本发明的半导体封装包括：在半导体衬底的一个表面上设置有电路元件的半导体元件; 设置在所述半导体衬底的另一个表面上的外部布线区域; 支撑基板，设置在所述半导体基板的一个表面上; 设置在所述半导体衬底的一个表面上的电极焊盘; 以及从电极焊盘延伸到半导体衬底的另一个表面的贯通电极。

5. 发明授权

US07180149B2 Semiconductor package with through-hole 有权
标题翻译：半导体封装带通孔
公开(公告)号：US07180149B2
公开(公告)日：2007-02-20
申请号：US10924205
申请日：2004-08-24
申请人： Satoshi Yamamoto , Tatsuo Suemasu , Sayaka Hirafune , Toshihiko Isokawa , Koichi Shiotani , Kazuya Matsumoto
发明人： Satoshi Yamamoto , Tatsuo Suemasu , Sayaka Hirafune , Toshihiko Isokawa , Koichi Shiotani , Kazuya Matsumoto
IPC分类号： H01L31/0203
CPC分类号： H01L24/94 , H01L21/76898 , H01L23/481 , H01L23/5389 , H01L24/48 , H01L25/0652 , H01L25/0657 , H01L27/14618 , H01L27/14632 , H01L27/14687 , H01L2224/02372 , H01L2224/0401 , H01L2224/13024 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2225/06524 , H01L2225/06541 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01067 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04953 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15788 , H01L2924/16195 , H01L2924/3025 , H01L2924/00 , H01L2224/45099
摘要： A semiconductor package of the invention comprises: a semiconductor element provided with a circuit element on one surface of a semiconductor substrate; an external wiring region provided on an other surface of the semiconductor substrate; a support substrate disposed on the one surface of the semiconductor substrate; an electrode pad disposed on the one surface of the semiconductor substrate; and a through-electrode which extends from the electrode pad through to the other surface of the semiconductor substrate.
摘要翻译：本发明的半导体封装包括：在半导体衬底的一个表面上设置有电路元件的半导体元件; 设置在所述半导体衬底的另一个表面上的外部布线区域; 支撑基板，设置在所述半导体基板的一个表面上; 设置在所述半导体衬底的一个表面上的电极焊盘; 以及从电极焊盘延伸到半导体衬底的另一个表面的贯通电极。

6. 发明申请

US20060001147A1 Semiconductor package and method for manufacturing the same 失效
标题翻译：半导体封装及其制造方法
公开(公告)号：US20060001147A1
公开(公告)日：2006-01-05
申请号：US11166195
申请日：2005-06-27
申请人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
发明人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
IPC分类号： H01L29/76
CPC分类号： H01L27/14618 , H01L31/0203 , H01L2224/94
摘要： A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.
摘要翻译：半导体封装包括：第一基板，包括：具有第一侧和第二侧的半导体基体材料; 设置在所述半导体基材的第一侧的功能元件; 第一布线通过所述第一布线电连接到所述功能元件的焊盘; 通孔互连，其电连接到所述焊盘，并且设置在从所述半导体基材的第一侧至其第二侧贯通的孔中，所述通孔互连包括第一绝缘膜和第一绝缘膜形成在第一绝缘膜上的导电材料; 以及围绕所述功能元件设置的密封材料; 经由密封材料结合到第一基板的第一侧的第二基板。

7. 发明申请

US20070264753A1 Semiconductor package and method for manufacturing the same 失效
标题翻译：半导体封装及其制造方法
公开(公告)号：US20070264753A1
公开(公告)日：2007-11-15
申请号：US11828699
申请日：2007-07-26
申请人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
发明人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
IPC分类号： H01L21/58
CPC分类号： H01L27/14618 , H01L31/0203 , H01L2224/94
摘要： A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.
摘要翻译：半导体封装包括：第一基板，包括：具有第一侧和第二侧的半导体基体材料; 设置在所述半导体基材的第一侧的功能元件; 第一布线通过所述第一布线电连接到所述功能元件的焊盘; 通孔互连，其电连接到所述焊盘，并且设置在从所述半导体基材的第一侧至其第二侧贯通的孔中，所述通孔互连包括第一绝缘膜和第一绝缘膜形成在第一绝缘膜上的导电材料; 以及围绕所述功能元件设置的密封材料; 经由密封材料结合到第一基板的第一侧的第二基板。

8. 发明授权

US07274101B2 Semiconductor package and method for manufacturing the same 失效
公开(公告)号：US07274101B2
公开(公告)日：2007-09-25
申请号：US11166195
申请日：2005-06-27
申请人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
发明人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
IPC分类号： H01L23/04 , H01L23/02 , H01L23/48 , H01L23/52
CPC分类号： H01L27/14618 , H01L31/0203 , H01L2224/94
摘要： A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.

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