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1. 发明申请

US20070037782A1 Therapeutic agent for ageing macular degeneration 审中-公开
标题翻译：老年黄斑变性治疗剂
公开(公告)号：US20070037782A1
公开(公告)日：2007-02-15
申请号：US10573590
申请日：2004-03-23
申请人： Satoshi Hibino , Masashi Yamada , Taketo Yamaji , Hiroto Suzuki
发明人： Satoshi Hibino , Masashi Yamada , Taketo Yamaji , Hiroto Suzuki
IPC分类号： A61K31/57
CPC分类号： A61K31/57 , A61K9/06 , C07J7/00
摘要： Provided is a medicament having an excellent therapeutic effect on ageing macular degeneration. The therapeutic agent for ageing macular degeneration comprises a progesterone derivative represented by the following formula (1): (wherein, R1 represents an alkyl group having from 1 to 23 carbon atoms) as an effective ingredient.
摘要翻译：本发明提供对老化黄斑变性具有优异治疗效果的药剂。老化黄斑变性治疗剂含有下式（1）表示的孕酮衍生物（其中，R 1表示碳原子数1〜23的烷基）作为有效成分。

2. 发明授权

US5801399A Semiconductor device with antireflection film 失效
标题翻译：具有抗反射膜的半导体器件
公开(公告)号：US5801399A
公开(公告)日：1998-09-01
申请号：US906511
申请日：1997-08-05
申请人： Atsuo Hattori , Satoshi Hibino
发明人： Atsuo Hattori , Satoshi Hibino
IPC分类号： H01L21/027 , G03F7/11 , H01L21/28 , H01L21/3213 , H01L29/49 , H01L27/108 , H01L29/00 , H01L29/04 , H01L31/0232
CPC分类号： H01L21/28026 , H01L21/32139 , H01L29/4933
摘要： A stress relaxation layer is inserted between an electrode layer and an antireflection layer to relax a stress imparted from one of the electrode and antireflection layers to the other. A semiconductor device is provided which can suppress separation of the antireflection film during device fabrication processes and dispense with the process of etching and removing the antireflection film.
摘要翻译：在电极层和抗反射层之间插入应力松弛层，以松弛由电极和抗反射层之一施加的应力。提供一种半导体器件，其可以抑制器件制造过程中的抗反射膜的分离，并省去蚀刻和去除防反射膜的工艺。

3. 发明授权

US5705426A Method of forming semiconductor device having planarized wiring with good thermal resistance 失效
标题翻译：形成具有良好热阻的平坦化布线的半导体器件的方法
公开(公告)号：US5705426A
公开(公告)日：1998-01-06
申请号：US757501
申请日：1996-11-27
申请人： Satoshi Hibino
发明人： Satoshi Hibino
IPC分类号： H01L21/28 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522 , H01L23/532 , H01L29/43
CPC分类号： H01L23/53223 , H01L2924/0002
摘要： A method of forming conductive wiring on a semiconductor substrate. A plurality of contact holes having different sizes are formed in an insulating film formed on the substrate. A first barrier metal layer is formed on the insulating film, and a tungsten layer is uniformly formed on the first barrier metal layer. The tungsten layer is etched back to form plug-shaped tungsten regions in small contact holes and tapered tungsten regions in large contact holes. The central area of the first barrier metal layer in the large contact hole is exposed. A second barrier metal layer is formed covering the plug-shaped tungsten region and the tapered tungsten region and the exposed first barrier metal layer and sandwiching the plug-shaped and tapered tungsten regions between the first and second barrier metal layers, preventing punch-through of Al atoms from an Al layer to be thereafter formed, into the substrate, even when the first barrier metal layer is damaged during etch-back.
摘要翻译：一种在半导体衬底上形成导电布线的方法。在形成在基板上的绝缘膜中形成具有不同尺寸的多个接触孔。在绝缘膜上形成第一阻挡金属层，在第一阻挡金属层上均匀地形成钨层。钨层被回蚀刻以在大的接触孔中的小接触孔和锥形钨区形成塞状钨区。暴露大接触孔中的第一阻挡金属层的中心区域。形成第二阻挡金属层，覆盖插塞状钨区域和锥形钨区域以及暴露的第一阻挡金属层，并且将第一和第二阻挡金属层之间的塞状和锥形钨区域夹在中间，防止穿孔即使当第一阻挡金属层在回蚀时被损坏时，即将形成Al Al的Al原子进入衬底。

4. 发明申请

US20050063106A1 Magnetic sensor and manufacturing method therefor 审中-公开
标题翻译：磁传感器及其制造方法
公开(公告)号：US20050063106A1
公开(公告)日：2005-03-24
申请号：US10936748
申请日：2004-09-09
申请人： Satoshi Hibino
发明人： Satoshi Hibino
IPC分类号： G11B5/127 , G11B5/33 , G11B5/39
CPC分类号： B82Y25/00 , B82Y10/00 , G11B5/3932 , G11B2005/3996
摘要： A magnetic sensor comprises a spin-valve type magnetoresistive element arranged on a substrate, wherein a bias magnetic layer made of a permanent magnet film is connected with both ends of the magnetoresistive element so as to detect the magnitude of a magnetic field. The bias magnetic layer is formed on an embedded layer made of a non-magnetic material, which comprises a thick first layer and a thin second layer that are sequentially formed and laminated together. The bias magnetic layer is composed of a CoCrPt alloy, and the thickness thereof ranges from 800 Å to 900 Å; the embedded layer is composed of Cr or a Cr alloy; the thickness of the first layer ranges from 2 nm to 10 nm. Thus, it is possible to freely set the combination of the coercive force and residual magnetism in the bias magnetic layer without changing the composition of a target.
摘要翻译：磁传感器包括布置在基板上的自旋阀型磁阻元件，其中由永磁体膜制成的偏磁层与磁阻元件的两端连接，以便检测磁场的大小。偏置磁性层形成在由非磁性材料制成的嵌入层上，该非磁性材料包括依次形成并层叠在一起的厚的第一层和薄的第二层。偏磁层由CoCrPt合金构成，其厚度范围为800〜900; 嵌入层由Cr或Cr合金组成; 第一层的厚度为2nm至10nm。因此，可以在不改变目标的组成的情况下自由地设定偏磁层中的矫顽力和剩余磁性的组合。

5. 发明授权

US6130158A Filling connection hole with wiring material by using centrifugal force 失效
标题翻译：用离心力填充接线孔与接线材料
公开(公告)号：US6130158A
公开(公告)日：2000-10-10
申请号：US599646
申请日：1996-02-12
申请人： Satoshi Hibino
发明人： Satoshi Hibino
IPC分类号： H01L21/28 , H01L21/31 , H01L21/3205 , H01L21/768 , H01L23/522 , H01L21/44
CPC分类号： H01L21/76882 , Y10T29/41
摘要： A method of manufacturing a semiconductor device includes the steps of: preparing a substrate having an insulating layer with a connection hole; forming a wiring layer covering the connection hole; and heating the substrate to a temperature equal to or higher than a temperature of fluidizing the wiring layer material and rotating the substrate in a direction of generating centrifugal force directing from an opening of the connection hole toward the bottom of the connection hole. The centrifugal force facilitates reflow of the wiring layer so that the inside of the connection hole can be more preferably filled and the surface of the wiring layer can be planarized.
摘要翻译：一种制造半导体器件的方法包括以下步骤：制备具有连接孔的具有绝缘层的衬底; 形成覆盖所述连接孔的布线层; 并将衬底加热到等于或高于使布线层材料流化的温度的温度，并且沿着从连接孔的开口向着连接孔的底部产生离心力的方向旋转衬底。离心力有利于布线层的回流，从而更优选地填充连接孔的内部，并且可以使布线层的表面平坦化。

6. 发明授权

US5776827A Wiring-forming method 失效
标题翻译：接线形成方法
公开(公告)号：US5776827A
公开(公告)日：1998-07-07
申请号：US643044
申请日：1996-05-02
申请人： Satoshi Hibino , Tetsuya Kuwajima
发明人： Satoshi Hibino , Tetsuya Kuwajima
IPC分类号： H01L21/285 , H01L21/3213 , H01L21/768 , H01L21/44
CPC分类号： H01L21/76865 , H01L21/2855 , H01L21/28556 , H01L21/32135 , H01L21/76843 , H01L21/76877
摘要： An insulating layer 6 is formed covering a lower level wiring layer 5. Contact hole 11 registered with the lower level wiring 5 is then formed in the insulating layer 6. An adhesion layer 12 is sputtered on the lower level wiring layer 5 and a whole surface of the third level insulating layer 6. Then, a blanket tungsten layer 13 is deposited on the adhesion layer 12. The whole surface of the blanket tungsten layer 13 is etched back until a small hollow gap is formed at the upper end portion of the contact hole 11, to leave the blanket tungsten layer 13 only in the inside of the contact hole 11. Thereafter, an Al alloy layer is reflow-sputtered on the whole surface of the insulating layer 6 and the inside of the contact holes at a comparatively low temperature to form an upper level wiring layer 15. The surface unevenness produced in etch-back process can be planarized. A wiring having a good coverage, a good quality of layer, and a flat surface can be formed.
摘要翻译：形成覆盖下层布线层5的绝缘层6.然后，在绝缘层6中形成与下层布线5配准的接触孔11.粘合层12溅射在下层布线层5上，整个表面然后，在粘合层12上沉积一层覆盖钨层13.将覆盖钨层13的整个表面进行回蚀刻，直到在触点的上端部形成小的中空间隙孔11，仅在接触孔11的内部留下覆盖层钨层13.之后，在绝缘层6的整个表面和接触孔的内部以相对低的速度回流溅射Al合金层温度以形成上层布线层15.可以平面化回蚀处理中产生的表面凹凸。可以形成具有良好覆盖率，良好质量的层和平坦表面的布线。

7. 发明授权

US5705429A Method of manufacturing aluminum wiring at a substrate temperature from 100 to 150 degrees celsius 失效
标题翻译：在100〜150摄氏度的基板温度下制造铝布线的方法
公开(公告)号：US5705429A
公开(公告)日：1998-01-06
申请号：US467846
申请日：1995-06-06
申请人： Takahisa Yamaha , Satoshi Hibino , Masaru Naito
发明人： Takahisa Yamaha , Satoshi Hibino , Masaru Naito
IPC分类号： H01L21/768 , H01L21/28
CPC分类号： H01L21/76877 , H01L21/2855
摘要： After forming a contact hole in an insulator layer, which is formed on a substrate covering an impurity doped region, a Ti film, a TiN film (or TiON film), and an Al alloy (for example, an alloy of Al--Si--Cu) layer are sputtered (consecutively from the bottom level) for forming a wiring material layer. A wiring layer is formed by patterning the wiring material layer in accordance with a wiring pattern. Portions with a 0% coverage of the Al alloy layer are eliminated by sputtering the Al alloy layer with a substrate temperature in a range between 100.degree.and 150.degree. C.
摘要翻译：在形成在覆盖杂质掺杂区域的基板上的绝缘体层中形成接触孔，Ti膜，TiN膜（或TiON膜）和Al合金（例如，Al-Si- Cu）层（从底层连续地）溅射以形成布线材料层。通过根据布线图案图案化布线材料层而形成布线层。 Al合金层的覆盖率为0％的部分通过溅射Al合金层，基板温度在100〜150℃的范围内。

8. 发明授权

US5637924A Semiconductor device having planarized wiring with good thermal resistance 失效
标题翻译：具有平坦化的具有良好热阻的布线的半导体器件
公开(公告)号：US5637924A
公开(公告)日：1997-06-10
申请号：US494265
申请日：1995-06-23
申请人： Satoshi Hibino
发明人： Satoshi Hibino
IPC分类号： H01L21/28 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522 , H01L23/532 , H01L29/43 , H01L23/48 , H01L29/40
CPC分类号： H01L23/53223 , H01L2924/0002
摘要： A plurality of contact holes having different sizes are formed in an insulating film formed on the substrate. A first barrier metal layer is formed on the insulating film, and a tungsten layer is uniformly formed on the first barrier metal layer. The tungsten layer is etched back to form plug-shaped tungsten regions in small contact holes and sloped tungsten regions in large contact holes. The central area of the first barrier metal layer in the large contact hole is exposed. A second barrier metal layer is formed covering the plug-shaped tungsten region and the tapered tungsten region and the exposed first barrier metal layer and sandwiching the plug-shaped and sloped tungsten regions between the first and second barrier metal layers, preventing pinch-through of Al atoms from an Al layer to be thereafter formed, into the substrate, even when the first barrier metal layer is damaged during etch-back.
摘要翻译：在形成在基板上的绝缘膜中形成具有不同尺寸的多个接触孔。在绝缘膜上形成第一阻挡金属层，在第一阻挡金属层上均匀地形成钨层。钨层被回蚀以在小接触孔和大接触孔中的倾斜钨区形成塞状钨区。暴露大接触孔中的第一阻挡金属层的中心区域。形成第二阻挡金属层，其覆盖塞状钨区域和锥形钨区域以及暴露的第一阻挡金属层，并且将第一和第二阻挡金属层之间的塞状和倾斜的钨区夹在第一和第二阻挡金属层之间，即使当第一阻挡金属层在回蚀时被损坏时，即将形成Al Al的Al原子进入衬底。

9. 发明授权

US5116995A Carbazole compounds 失效
标题翻译：卡博唑化合物
公开(公告)号：US5116995A
公开(公告)日：1992-05-26
申请号：US702507
申请日：1991-05-20
申请人： Atsuro Nakazato , Sanae Kitsukawa , Yutaka Kawashima , Katsuo Hatayama , Satoshi Hibino
发明人： Atsuro Nakazato , Sanae Kitsukawa , Yutaka Kawashima , Katsuo Hatayama , Satoshi Hibino
IPC分类号： C07D209/86
CPC分类号： C07D209/86
摘要： Carbazole compounds represented by the formula ##STR1## wherein R.sup.1 is a hydrogen atom or an alkyl group having 1 to 5 carbon atoms, R.sup.2 is a hydrogen atom, an alkyl group having 1 to 5 carbon atoms, an alkanoyl group having 2 to 6 carbon atoms or a benzoyl group, R.sup.3 and R.sup.4 are the same or different, and are each hydrogen atom, an alkyl group having 1 to 7 carbon atoms, an alkenyl group having 2 to 4 carbon atoms, an alkyl group having 1 to 3 carbon atoms substituted by a phenyl group, or R.sup.3 and R.sup.4 together with the nitrogen atom to which they are attached form a morpholino group, a piperidino group, a pyrrolidino group or a piperazino group, and n is an integer from 1 to 3, and salts thereof have strong antipsychotic activity.

10. 发明申请

US20080138509A1 Magnetic sensor and manufacturing method therefor 审中-公开
标题翻译：磁传感器及其制造方法
公开(公告)号：US20080138509A1
公开(公告)日：2008-06-12
申请号：US11878608
申请日：2007-07-25
申请人： Satoshi Hibino
发明人： Satoshi Hibino
IPC分类号： B05D5/12 , C23C14/34
CPC分类号： B82Y25/00 , B82Y10/00 , G11B5/3932 , G11B2005/3996
摘要： A magnetic sensor comprises a spin-valve type magnetoresistive element arranged on a substrate, wherein a bias magnetic layer made of a permanent magnet film is connected with both ends of the magnetoresistive element so as to detect the magnitude of a magnetic field. The bias magnetic layer is formed on an embedded layer made of a non-magnetic material, which comprises a thick first layer and a thin second layer that are sequentially formed and laminated together. The bias magnetic layer is composed of a CoCrPt alloy, and the thickness thereof ranges from 800 Å to 900 Å; the embedded layer is composed of Cr or a Cr alloy; the thickness of the first layer ranges from 2 nm to 10 nm. Thus, it is possible to freely set the combination of the coercive force and residual magnetism in the bias magnetic layer without changing the composition of a target.
摘要翻译：磁传感器包括布置在基板上的自旋阀型磁阻元件，其中由永磁体膜制成的偏磁层与磁阻元件的两端连接，以便检测磁场的大小。偏置磁性层形成在由非磁性材料制成的嵌入层上，该非磁性材料包括依次形成并层叠在一起的厚的第一层和薄的第二层。偏磁层由CoCrPt合金构成，其厚度范围为800〜900; 嵌入层由Cr或Cr合金组成; 第一层的厚度为2nm至10nm。因此，可以在不改变目标的组成的情况下自由地设定偏磁层中的矫顽力和剩余磁性的组合。

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