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1. 发明申请

US20140082331A1 SYSTEM AND METHOD FOR SYNCHRONIZING PROCESSOR INSTRUCTION EXECUTION 有权
标题翻译：用于同步处理器指令执行的系统和方法
公开(公告)号：US20140082331A1
公开(公告)日：2014-03-20
申请号：US13620047
申请日：2012-09-14
申请人： Willliam David Smith, II , Safayet Nizam Uddin Ahmed , Jon Marc Diekema
发明人： Willliam David Smith, II , Safayet Nizam Uddin Ahmed , Jon Marc Diekema
IPC分类号： G06F9/30
CPC分类号： G06F9/4887 , G06F11/1691 , G06F11/182 , G06F11/2038 , G06F2201/815
摘要： A system and method for controlling processor instruction execution. In one example, a method for synchronizing a number of instructions performed by processors includes instructing a first processor to iteratively execute instructions via a first set of iterations until a predetermined time period has elapsed. A number of instructions executed in each iteration of the first set of iterations is less than a number of instructions executed in a prior iteration of the first set of iterations. The method also includes instructing a second processor to iteratively execute instructions via a second set of iterations until the predetermined time period has elapsed. A number of instructions executed in each iteration of the second set of iterations is less than a number of instructions executed in a prior iteration of the second set of iterations. The method includes determining whether additional instructions are to be executed.
摘要翻译：一种用于控制处理器指令执行的系统和方法。在一个示例中，用于同步由处理器执行的多个指令的方法包括指示第一处理器经由第一组迭代迭代地执行指令，直到经过预定时间段。在第一组迭代的每次迭代中执行的多个指令小于在第一组迭代的先前迭代中执行的指令数量。该方法还包括指示第二处理器经由第二组迭代迭代地执行指令，直到经过了预定时间段。在第二组迭代的每次迭代中执行的多个指令小于在第二组迭代的先前迭代中执行的指令数量。该方法包括确定是否执行附加指令。

2. 发明授权

US09256426B2 Controlling total number of instructions executed to a desired number after iterations of monitoring for successively less number of instructions until a predetermined time period elapse 有权
标题翻译：控制在连续少量指令的监视的迭代之后执行到所需数量的指令的总数，直到经过预定时间段
公开(公告)号：US09256426B2
公开(公告)日：2016-02-09
申请号：US13620063
申请日：2012-09-14
申请人： William David Smith, II , Jon Marc Diekema , Joshua Nathaniel Edmison , Safayet Nizam Uddin Ahmed
发明人： William David Smith, II , Jon Marc Diekema , Joshua Nathaniel Edmison , Safayet Nizam Uddin Ahmed
IPC分类号： G06F9/30 , G06F11/14 , G06F11/16 , G06F11/18
CPC分类号： G06F9/30 , G06F9/30076 , G06F11/1484 , G06F11/1629 , G06F11/1683 , G06F11/1691 , G06F11/184 , G06F2201/88
摘要： A system and method for controlling processor instruction execution. In one example, a method for controlling a total number of instructions executed by a processor includes instructing the processor to iteratively execute instructions via multiple iterations until a predetermined time period has elapsed. A number of instructions executed in each iteration of the iterations is less than a number of instructions executed in a prior iteration of the iterations. The method also includes determining the total number of instructions executed during the predetermined time period.
摘要翻译：一种用于控制处理器指令执行的系统和方法。在一个示例中，用于控制由处理器执行的指令的总数的方法包括指示处理器经由多次迭代迭代地执行指令，直到经过预定时间段。在迭代的每次迭代中执行的许多指令小于在迭代的先前迭代中执行的指令数量。该方法还包括确定在预定时间段期间执行的指令的总数。

3. 发明授权

US09342358B2 System and method for synchronizing processor instruction execution 有权
标题翻译：用于同步处理器指令执行的系统和方法
公开(公告)号：US09342358B2
公开(公告)日：2016-05-17
申请号：US13620047
申请日：2012-09-14
申请人： William David Smith, II , Safayet Nizam Uddin Ahmed , Jon Marc Diekema
发明人： William David Smith, II , Safayet Nizam Uddin Ahmed , Jon Marc Diekema
IPC分类号： G06F7/38 , G06F9/00 , G06F9/44 , G06F9/48 , G06F11/16 , G06F11/18 , G06F11/20
CPC分类号： G06F9/4887 , G06F11/1691 , G06F11/182 , G06F11/2038 , G06F2201/815
摘要： A system and method for controlling processor instruction execution. In one example, a method for synchronizing a number of instructions performed by processors includes instructing a first processor to iteratively execute instructions via a first set of iterations until a predetermined time period has elapsed. A number of instructions executed in each iteration of the first set of iterations is less than a number of instructions executed in a prior iteration of the first set of iterations. The method also includes instructing a second processor to iteratively execute instructions via a second set of iterations until the predetermined time period has elapsed. A number of instructions executed in each iteration of the second set of iterations is less than a number of instructions executed in a prior iteration of the second set of iterations. The method includes determining whether additional instructions are to be executed.
摘要翻译：一种用于控制处理器指令执行的系统和方法。在一个示例中，用于同步由处理器执行的多个指令的方法包括指示第一处理器经由第一组迭代迭代地执行指令，直到经过预定时间段。在第一组迭代的每次迭代中执行的多个指令小于在第一组迭代的先前迭代中执行的指令数量。该方法还包括指示第二处理器经由第二组迭代迭代地执行指令，直到经过了预定时间段。在第二组迭代的每次迭代中执行的多个指令小于在第二组迭代的先前迭代中执行的指令数量。该方法包括确定是否执行附加指令。

4. 发明申请

US20140082340A1 SYSTEM AND METHOD FOR CONTROLLING PROCESSOR INSTRUCTION EXECUTION 有权
标题翻译：用于控制处理器指令执行的系统和方法
公开(公告)号：US20140082340A1
公开(公告)日：2014-03-20
申请号：US13620063
申请日：2012-09-14
申请人： William David Smith, II , Jon Marc Diekema , Joshua Nathaniel Edmison , Safayet Nizam Uddin Ahmed
发明人： William David Smith, II , Jon Marc Diekema , Joshua Nathaniel Edmison , Safayet Nizam Uddin Ahmed
IPC分类号： G06F9/30
CPC分类号： G06F9/30 , G06F9/30076 , G06F11/1484 , G06F11/1629 , G06F11/1683 , G06F11/1691 , G06F11/184 , G06F2201/88
摘要： A system and method for controlling processor instruction execution. In one example, a method for controlling a total number of instructions executed by a processor includes instructing the processor to iteratively execute instructions via multiple iterations until a predetermined time period has elapsed. A number of instructions executed in each iteration of the iterations is less than a number of instructions executed in a prior iteration of the iterations. The method also includes determining the total number of instructions executed during the predetermined time period.
摘要翻译：一种用于控制处理器指令执行的系统和方法。在一个示例中，用于控制由处理器执行的指令的总数的方法包括指示处理器经由多次迭代迭代地执行指令，直到经过预定时间段。在迭代的每次迭代中执行的许多指令小于在迭代的先前迭代中执行的指令数量。该方法还包括确定在预定时间段期间执行的指令的总数。

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