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1. 发明授权

US08699204B2 Element array and footprint layout for element array 有权
标题翻译：元素数组和元素数组的排版布局
公开(公告)号：US08699204B2
公开(公告)日：2014-04-15
申请号：US13032042
申请日：2011-02-22
申请人： Ronald S. Demcko , Jeff Cheng , Michael Kirk
发明人： Ronald S. Demcko , Jeff Cheng , Michael Kirk
IPC分类号： H01G4/228 , H01G4/005 , H01G4/232 , H01G4/30
CPC分类号： H01G4/005 , H01C1/14 , H01C1/16 , H01C7/10 , H01G4/228 , H01G4/232 , H01G4/30 , H01G4/385
摘要： An element array and a footprint layout for an element array are disclosed. The element array can have a rectangular configuration defining two side surfaces and two end surfaces. The element array can include a plurality of stacked dielectric-electrode layers. One dielectric-electrode layer can include a plurality of element electrodes, such as eight element electrodes. Each of the plurality of element electrodes forms a part of an individual element for the element array. The element array device can further include a common electrode. The common electrode is used as part of each of the individual elements for the element array. The common electrode can include a lead for termination to one of the two end surfaces of the element array or, in a particular embodiment, to one of the two side surfaces of the element array.
摘要翻译：公开了用于元件阵列的元件阵列和覆盖布局。元件阵列可以具有限定两个侧表面和两个端表面的矩形配置。元件阵列可以包括多个堆叠的电介质电极层。一个电介质电极层可以包括多个元件电极，例如八个元件电极。多个元件电极中的每一个形成元件阵列的单独元件的一部分。元件阵列器件还可以包括公共电极。公共电极用作元件阵列的每个单独元件的一部分。公共电极可以包括用于端接到元件阵列的两个端表面之一的导线，或者在特定实施例中，连接到元件阵列的两个侧表面之一。

2. 发明申请

US20110205725A1 ELEMENT ARRAY AND FOOTPRINT LAYOUT FOR ELEMENT ARRAY 有权
标题翻译：元素阵列和元素阵列的元素布局
公开(公告)号：US20110205725A1
公开(公告)日：2011-08-25
申请号：US13032042
申请日：2011-02-22
申请人： Ronald S. Demcko , Jeff Cheng , Michael Kirk
发明人： Ronald S. Demcko , Jeff Cheng , Michael Kirk
IPC分类号： H05K7/02
CPC分类号： H01G4/005 , H01C1/14 , H01C1/16 , H01C7/10 , H01G4/228 , H01G4/232 , H01G4/30 , H01G4/385
摘要： An element array and a footprint layout for an element array are disclosed. The element array can have a rectangular configuration defining two side surfaces and two end surfaces. The element array can include a plurality of stacked dielectric-electrode layers. One dielectric-electrode layer can include a plurality of element electrodes, such as eight element electrodes. Each of the plurality of element electrodes forms a part of an individual element for the element array. The element array device can further include a common electrode. The common electrode is used as part of each of the individual elements for the element array. The common electrode can include a lead for termination to one of the two end surfaces of the element array or, in a particular embodiment, to one of the two side surfaces of the element array.
摘要翻译：公开了用于元件阵列的元件阵列和覆盖布局。元件阵列可以具有限定两个侧表面和两个端表面的矩形配置。元件阵列可以包括多个堆叠的电介质电极层。一个电介质电极层可以包括多个元件电极，例如八个元件电极。多个元件电极中的每一个形成元件阵列的单独元件的一部分。元件阵列器件还可以包括公共电极。公共电极用作元件阵列的每个单独元件的一部分。公共电极可以包括用于端接到元件阵列的两个端表面之一的导线，或者在特定实施例中，连接到元件阵列的两个侧表面之一。

3. 发明授权

US07724496B2 Multilayer vertically integrated array technology 有权
标题翻译：多层垂直集成阵列技术
公开(公告)号：US07724496B2
公开(公告)日：2010-05-25
申请号：US11590681
申请日：2006-10-31
申请人： Carl L. Eggerding , Ronald S. Demcko , John L. Galvagni
发明人： Carl L. Eggerding , Ronald S. Demcko , John L. Galvagni
IPC分类号： H01G4/005 , H01G4/228
CPC分类号： H01G4/40 , H01C1/142 , H01C1/148 , H01C7/18 , H01G4/012 , H01G4/30 , H01G4/35
摘要： The present subject matter is directed to methods and apparatus for providing a multilayer array component with interdigitated electrode layer portions configured to selectively provide signal filtering characteristics, over-voltage transient suppression capabilities, and land grid array (LGA) terminations. Embodiments of the present subject matter may define a single capacitor, a capacitor array, or a multilayer vertically integrated array with configurable equivalent electrical characteristics including equivalent series inductance (ESL), equivalent series resistance (ESR), and configurable capacitance and voltage clamping and transient suppression capabilities.
摘要翻译：本发明涉及用于提供具有交错电极层部分的多层阵列部件的方法和装置，其配置为选择性地提供信号滤波特性，过电压瞬变抑制能力和平面栅格阵列（LGA）终端。本主题的实施例可以定义单个电容器，电容器阵列或具有可配置的等效电特性的多层垂直集成阵列，包括等效串联电感（ESL），等效串联电阻（ESR）以及可配置的电容和电压钳位和瞬态抑制能力。

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