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1. 发明申请

US20150381216A1 Adaptive High-Order Nonlinear Function Approximation Using Time-Domain Volterra Series to Provide Flexible High Performance Digital Pre-Distortion 有权
标题翻译：自适应高阶非线性函数逼近使用时域Volterra系列提供灵活的高性能数字预失真
公开(公告)号：US20150381216A1
公开(公告)日：2015-12-31
申请号：US14318000
申请日：2014-06-27
申请人： Roi M. Shor , Avraham D. Gal , Peter Z. Rashev
发明人： Roi M. Shor , Avraham D. Gal , Peter Z. Rashev
IPC分类号： H04B1/04 , H04L25/10
CPC分类号： H04B1/0475 , H03F1/3241 , H04B2001/0425 , H04L25/10
摘要： A method and apparatus are used to predistort input signal samples according to Volterra Series Approximation Model using one or more digital predistortion blocks (300) having a plurality of predistorter cells (301-303), each including an input multiplication stage (366-367) for combining absolute sample values received from an absolute sample delay line (362) into a first stage output, a lookup table (368) connected to be addressed by the first stage output for generating an LUT output, and a plurality of output multiplication stages (371-372, 373-374) for combining the LUT output with samples received from the amplitude sample delay line (362) and signal sample delay line (363) to generate an output signal sample yQ from said predistorter cell, where the output signal samples yQ from the predistorter cells are combined at an output adder circuit (375) to generate one or more Volterra terms of a combined signal (yOUT[n]).
摘要翻译：一种方法和装置用于使用具有多个预失真器单元（301-303）的一个或多个数字预失真块（300）来根据Volterra系列近似模型预失真输入信号样本，每个包括输入乘法级（366-367）用于将从绝对采样延迟线（362）接收的绝对采样值组合成第一级输出，连接到由第一级输出寻址以产生LUT输出的查找表（368）和多个输出乘法级（用于将LUT输出与从幅度采样延迟线（362）和信号采样延迟线（363）接收的样本组合，以产生来自所述预失真器单元的输出信号采样yQ，其中输出信号样本（371-372,373-374）来自预失真器单元的yQ在输出加法器电路（375）处组合以产生组合信号（yOUT [n]）的一个或多个Volterra项。

2. 发明授权

US09252821B2 Adaptive high-order nonlinear function approximation using time-domain volterra series to provide flexible high performance digital pre-distortion 有权
标题翻译：使用时域Volterra系列的自适应高阶非线性函数逼近提供灵活的高性能数字预失真
公开(公告)号：US09252821B2
公开(公告)日：2016-02-02
申请号：US14318000
申请日：2014-06-27
申请人： Roi M. Shor , Avraham D. Gal , Peter Z. Rashev
发明人： Roi M. Shor , Avraham D. Gal , Peter Z. Rashev
IPC分类号： H04K1/02 , H04L25/03 , H04L25/49 , H04B1/04 , H04L25/10
CPC分类号： H04B1/0475 , H03F1/3241 , H04B2001/0425 , H04L25/10
摘要： A method and apparatus are used to predistort input signal samples according to Volterra Series Approximation Model using one or more digital predistortion blocks (300) having a plurality of predistorter cells (301-303), each including an input multiplication stage (366-367) for combining absolute sample values received from an absolute sample delay line (362) into a first stage output, a lookup table (368) connected to be addressed by the first stage output for generating an LUT output, and a plurality of output multiplication stages (371-372, 373-374) for combining the LUT output with samples received from the amplitude sample delay line (362) and signal sample delay line (363) to generate an output signal sample yQ from said predistorter cell, where the output signal samples yQ from the predistorter cells are combined at an output adder circuit (375) to generate one or more Volterra terms of a combined signal (yOUT[n]).
摘要翻译：一种方法和装置用于使用具有多个预失真器单元（301-303）的一个或多个数字预失真块（300）来根据Volterra系列近似模型预失真输入信号样本，每个包括输入乘法级（366-367）用于将从绝对采样延迟线（362）接收的绝对采样值组合成第一级输出，连接到由第一级输出寻址以产生LUT输出的查找表（368）和多个输出乘法级（用于将LUT输出与从幅度采样延迟线（362）和信号采样延迟线（363）接收的样本组合，以产生来自所述预失真器单元的输出信号采样yQ，其中输出信号样本（371-372,373-374）来自预失真器单元的yQ在输出加法器电路（375）处组合以产生组合信号（yOUT [n]）的一个或多个Volterra项。

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