专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120260475A1 Rotatable End Pin For Instrument Strap 有权
标题翻译：仪表带可旋转端针
公开(公告)号：US20120260475A1
公开(公告)日：2012-10-18
申请号：US13443082
申请日：2012-04-10
申请人： James D'Addario , Robert O. Miller
发明人： James D'Addario , Robert O. Miller
IPC分类号： G10G5/00 , B23P11/00
CPC分类号： G10G5/005 , Y10T24/4599 , Y10T29/49826
摘要： An end pin has a composite shoulder with a fixed lower half and a rotatable upper half. The halves are alignable in a first, installation mode of minimal footprint relative to the hole and slit in the end piece to permit the pin to be easily inserted through the hole in the end piece. The upper half is rotated into a second, locking mode that increases the footprint of the pin over the hole and slit, thereby preventing inadvertent disengagement of the strap from the pin.
摘要翻译：端针具有复合肩部，其具有固定的下半部和可旋转的上半部。一半可相对于端部件中的孔和狭缝以最小占地空间的第一安装模式对准，以允许销易于插入端件中的孔。上半部旋转成第二锁定模式，其增加了销在孔和狭缝上的占地面积，从而防止带从销的意外脱离。

2. 发明授权

US07447404B2 Photonic integrated circuit 失效
标题翻译：光子集成电路
公开(公告)号：US07447404B2
公开(公告)日：2008-11-04
申请号：US11337927
申请日：2006-01-24
申请人： Robert O. Miller
发明人： Robert O. Miller
IPC分类号： G02B6/12 , G02B6/26 , G02B6/42 , G02B6/00
CPC分类号： G02B6/1225 , B82Y20/00 , G02B6/12004 , G02B6/30 , G02B6/305 , G02B6/3652 , G02B6/3692
摘要： An optical platform including optical bench, an optical or photonic coupling device and a photonic circuit. The photonic circuit includes a photonic crystal along a waveguide and/or defect. The coupling device may be a waveguide or impedance matching interconnection device. The optical bench includes a rectangular trench to seat an optical fiber and provide alignment with the photonic circuit.
摘要翻译：包括光学平台，光学或光子耦合器件和光子电路的光学平台。光子电路包括沿着波导和/或缺陷的光子晶体。耦合器件可以是波导或阻抗匹配互连器件。光学工作台包括一个矩形沟槽，用于安置光纤并提供与光子电路的对准。

3. 发明授权

US07065274B2 Optical coupling device 失效
标题翻译：光耦合装置
公开(公告)号：US07065274B2
公开(公告)日：2006-06-20
申请号：US10855482
申请日：2004-05-27
申请人： Robert O. Miller
发明人： Robert O. Miller
IPC分类号： G02B6/26
CPC分类号： G02B6/305
摘要： An optical coupling device for the efficient transfer of an optical signal between optical components. The device can receive an optical signal from a transmitting component connected to its input end and efficiently transmit that signal to a receiving component connected to its output end. The instant device includes a combination of two or more dielectric materials and provides impedance matching at the input and output ends as well as impedance conservation during propagation of the optical signal through the device. Impedance matching at the input and output ends is controlled through variations in the relative proportions of the constituent dielectric materials of the device in the cross-sections of input and output ends to achieve an effective permittivity that closely matches that of the interconnected component. Impedance conservation within the instant device is achieved through simultaneous variations in the cross-sectional shape of the device and cross-sectional fill factors of the constituent dielectric materials. The impedance conditions, in combination with high spatial overlap at the input and output ends, minimize losses in the power of signal transmitted between the interconnected optical components.
摘要翻译：一种用于在光学部件之间有效传输光信号的光耦合装置。该设备可以从连接到其输入端的发送组件接收光信号，并将该信号有效地发送到连接到其输出端的接收组件。本装置包括两个或更多个介电材料的组合，并且在输入和输出端提供阻抗匹配以及在光信号通过装置的传播期间的阻抗守恒。在输入和输出端的阻抗匹配通过输入和输出端的横截面中的器件的构成电介质材料的相对比例的变化来控制，以实现与互连部件的截面紧密匹配的有效介电常数。瞬时装置内的阻抗保护通过装置的横截面形状和构成介电材料的横截面填充因子的同时变化来实现。阻抗条件与输入和输出端的高空间重叠相结合，使互连的光学部件之间传输的信号的功率损耗最小化。

4. 发明授权

US07054524B2 Asymmetric photonic crystal waveguide element having symmetric mode fields 失效
标题翻译：具有对称模场的非对称光子晶体波导元件
公开(公告)号：US07054524B2
公开(公告)日：2006-05-30
申请号：US10929930
申请日：2004-08-30
申请人： Robert O. Miller
发明人： Robert O. Miller
IPC分类号： G02B6/02 , G02B6/10
CPC分类号： G02B6/1225 , B82Y20/00 , G02B6/10
摘要： A slab photonic crystal waveguide that preserves the parity of guided modes. The waveguide includes a photonic crystal layer interposed between two dielectric layers. The photonic crystal layer includes a periodic arrangement of asymmetrically shaped dielectric regions within a surrounding dielectric material. The waveguide precludes conversion of the state of parity of an introduced input mode by maintaining a symmetric mode field distribution. A symmetric mode field distribution is attained through variations in the dielectric constants of the dielectric layers that compensate for asymmetric mode localization tendencies associated with the asymmetric periodically arranged dielectric regions within the photonic crystal layer.
摘要翻译：一种平板光子晶体波导，保持引导模式的奇偶校验。波导包括介于两个电介质层之间的光子晶体层。光子晶体层包括在周围电介质材料内的不对称形状的介电区域的周期性布置。波导通过维持对称模式场分布来阻止引入的输入模式的奇偶校验状态的转换。通过介电层的介电常数的变化来实现对称模式场分布，其补偿与光子晶体层内的不对称周期性排列的介电区域相关联的不对称模式定位倾向。

5. 外观设计

USD510071S1 Signal plug handle 失效
标题翻译：信号插头手柄
公开(公告)号：USD510071S1
公开(公告)日：2005-09-27
申请号：US29170593
申请日：2002-11-08
申请人： James D'Addario , Robert O. Miller
设计人： James D'Addario , Robert O. Miller

6. 发明授权

US06882460B2 Phase angle controlled stationary elements for long wavelength electromagnetic radiation 失效
公开(公告)号：US06882460B2
公开(公告)日：2005-04-19
申请号：US10670909
申请日：2003-09-25
申请人： David Tsu , Robert O. Miller
发明人： David Tsu , Robert O. Miller
IPC分类号： G02B6/32 , G01N20060101 , G02B6/42 , G02B26/06 , G02F1/01 , G02F1/29 , G02F1/31 , G11C13/00 , H01H51/22 , H01Q15/00 , H01Q23/00
CPC分类号： G02F1/292 , G02F1/0126 , G02F2203/13 , G02F2203/18 , H01Q15/002 , H01Q23/00
摘要： An element for reflecting, transmitting, focusing, defocusing or wavefront correction of electromagnetic radiation in the terahertz frequency range. The elements include a grid of conductive strips including active regions comprising a chalcogenide phase change material. The chalcogenide material can be in an amorphous, crystalline or partially crystalline state. The dispersive characteristics of the grid (e.g. impedance, admittance, capacitance, inductance) influence one or more of the reflection, transmission, state of focusing or wavefront characteristics of incident electromagnetic radiation through the action of a stored phase taper formed by establishing a crystallinity gradient over a series of active chalcogenide regions or domains in one or more directions of the element. The dispersive characteristics of the grid are determined by the structural states of the active chalcogenide regions contained therein and are reconfigurable through transformations of one or more chalcogenide regions from one structural state to another by providing energy to the chalcogenide material. In a preferred embodiment, the individual active chalcogenide regions are much smaller than the operating wavelength of the element so that a plurality of active chalcogenide regions is included in wavelength scale domains. In these embodiments, crystallinity gradients may be formed through monotonic increases or decreases in the domain average fractional crystallinity in one or more directions of an element where no particular requirement on the fractional crystallinity of individual active regions need be imposed. In these embodiments, the domain fractional crystallinity is a statistical average over the individual chalcogenide regions contained therein and phase tapers may be achieved in multistate or binary mode. The element may be free-standing, supported on a dielectric substrate or interposed between two or more dielectric materials.

7. 发明授权

US06350941B1 Hand drum hoop 失效
标题翻译：手鼓箍
公开(公告)号：US06350941B1
公开(公告)日：2002-02-26
申请号：US09484624
申请日：2000-01-18
申请人： Robert O. Miller , James D'Addario
发明人： Robert O. Miller , James D'Addario
IPC分类号： G10D1302
CPC分类号： G10D13/023
摘要： A drum hoop having an asymmetrical cross section for use in combination with hand drums. The drum hoop upper inner edge is connected to a lower inner edge having a larger diameter producing a drum hoop inner surface having an angular orientation to the central axis of the drum. The angular orientation of the inner surface maximizes clearance between the drum hoop and the variable diameter exterior surface of the drum shell. Added clearance allows a drum hoop constructed according to the invention to accommodate variations in exterior surface diameter often encountered in hand made drum shells common in the art.
摘要翻译：具有与手鼓组合使用的不对称横截面的鼓箍。鼓环上部内边缘连接到具有较大直径的下部内边缘，产生具有与滚筒中心轴线成角度定向的鼓环内表面。内表面的角度取向最大化鼓箍与鼓壳的可变直径外表面之间的间隙。增加的间隙允许根据本发明构造的鼓箍适应在本领域中常见的手工制造的鼓壳中经常遇到的外表面直径的变化。

8. 发明授权

US5371041A Method for forming a contact/VIA 失效
标题翻译：形成接触/ VIA的方法
公开(公告)号：US5371041A
公开(公告)日：1994-12-06
申请号：US831089
申请日：1992-02-07
申请人： Fu-Tai Liou , Robert O. Miller , Mohammed M. Farohani , Yu-Pin Han
发明人： Fu-Tai Liou , Robert O. Miller , Mohammed M. Farohani , Yu-Pin Han
IPC分类号： H01L21/768 , H01L23/485 , H01L23/532 , H01L21/44
CPC分类号： H01L21/76856 , H01L21/76802 , H01L21/76831 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L23/53223 , H01L2924/0002 , Y10S148/147 , Y10S257/915
摘要： A method for forming a connection between two levels in a semiconductor structure includes first forming a VIA (14) through an insulating layer (12) to an underlying structure (10). Sidewall spacers (22) and (24) are formed on the vertical walls of the VIA (14). The spacers (22) and (24) have tapered surfaces. A barrier layer (30) is then formed over the bottom surface of the VIA followed by CVD deposition of a conductive layer (32) of WSi.sub.2 to provide a conformal conductive layer. An aluminum layer (38) is then deposited by physical vapor deposition techniques with the descending portions of layer (32) providing a conductive connection between the aluminum layer (38) and the lower structure (10) in the VIA (14).
摘要翻译：用于在半导体结构中形成两层之间的连接的方法包括首先通过绝缘层（12）形成VIA（14）到下面的结构（10）。侧壁间隔件（22）和（24）形成在VIA（14）的垂直壁上。间隔件（22）和（24）具有锥形表面。然后在VIA的底表面上形成阻挡层（30），随后CVD沉积WSi2的导电层（32）以提供保形导电层。然后通过物理气相沉积技术沉积铝层（38），层（32）的下降部分在VIA（14）中的铝层（38）和下结构（10）之间提供导电连接。

9. 发明授权

US5348901A Interconnect and resistor for integrated circuits 失效
标题翻译：集成电路的互连和电阻
公开(公告)号：US5348901A
公开(公告)日：1994-09-20
申请号：US911167
申请日：1992-07-09
申请人： Fusen E. Chen , Girish A. Dixit , Robert O. Miller
发明人： Fusen E. Chen , Girish A. Dixit , Robert O. Miller
IPC分类号： H01L21/265 , H01L21/02 , H01L21/316 , H01L21/768 , H01L23/522 , H01L27/00 , H01L27/10 , H01L27/11 , H01L21/205 , H01L21/285
CPC分类号： H01L28/20 , H01L21/76889 , H01L27/1112
摘要： A method is provided for forming a polycrystalline silicon resistive load element of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A lightly doped first conductive layer having a conductivity of a first type. A first oxide layer is formed over the integrated circuit with a first opening therethrough exposing a portion of the first conductive layer. Using the first oxide layer as a mask, the exposed portion of the first conductive layer is then implanted with a dopant of a second conductivity type to form a junction between the exposed portion and the portion covered by the mask. A second oxide region is then formed on a portion of the first oxide layer in the first opening, over the junction and over a portion of the exposed first conductive layer adjacent to the junction. A silicide is formed over the exposed portion of the first conductive layer.
摘要翻译：提供一种用于形成半导体集成电路的多晶硅电阻性负载元件的方法和根据该集成电路形成的集成电路。具有第一类型的导电性的轻掺杂的第一导电层。在集成电路上形成第一氧化物层，其中第一开口穿过其暴露第一导电层的一部分。使用第一氧化物层作为掩模，然后用第二导电类型的掺杂剂注入第一导电层的暴露部分，以形成暴露部分和被掩模覆盖的部分之间的结。然后在第一开口中的第一氧化物层的一部分上形成第二氧化物区域，并且在接合处以及暴露的第一导电层的与接合部相邻的部分上形成第二氧化物区域。在第一导电层的暴露部分上形成硅化物。

10. 发明授权

US5278098A Method for self-aligned polysilicon contact formation 失效
标题翻译：自对准多晶硅接触形成方法
公开(公告)号：US5278098A
公开(公告)日：1994-01-11
申请号：US939951
申请日：1992-09-03
申请人： Che C. Wei , Chiara Zaccherini , Robert O. Miller , Girish A. Dixit
发明人： Che C. Wei , Chiara Zaccherini , Robert O. Miller , Girish A. Dixit
IPC分类号： H01L21/28 , H01L21/285 , H01L21/3205 , H01L21/74 , H01L21/768 , H01L23/522 , H01L23/532 , H01L21/88 , H01L21/316 , H01L21/78
CPC分类号： H01L21/76889 , H01L21/28525 , H01L21/76895 , H01L21/76897 , H01L23/53271 , H01L2924/0002
摘要： A polycrystalline silicon layer is deposited and patterned to define a level of interconnect. Contact openings to lower conductive layers are then defined and patterned. A refractory metal such as tungsten is selectively deposited over the device, so that it adheres to the polycrystalline silicon in the interconnect leads and silicon of the lower conductive layer which is exposed in the contact openings. This provides a low resistance interconnect, and good, metal, contacts to underlying layers. Shared contacts between two or more polycrystalline silicon interconnect layers and in underlying conductive layers such as a substrate are easily formed using this technique.
摘要翻译：沉积并图案化多晶硅层以限定互连水平。然后对下导电层的接触开口进行限定和图案化。诸如钨的难熔金属被选择性地沉积在器件上，使得其粘附到互连引线中的多晶硅和暴露在接触开口中的下导电层的硅。这提供了低电阻互连，以及良好的金属触点到底层。使用该技术容易地形成两个或更多个多晶硅互连层之间和底层导电层（例如基板）中的共用接触。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式