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1. 发明授权

US06898682B2 Automatic READ latency calculation without software intervention for a source-synchronous interface 失效
标题翻译：自动读取延迟计算，无需软件干预源同步接口
公开(公告)号：US06898682B2
公开(公告)日：2005-05-24
申请号：US10217174
申请日：2002-08-12
申请人： James A. Welker , Srinath Audityan , Jose M. Nunez , Robert C. Podnar
发明人： James A. Welker , Srinath Audityan , Jose M. Nunez , Robert C. Podnar
IPC分类号： G06F12/00 , G06F12/14 , G06F13/42
CPC分类号： G06F13/4217
摘要： In response to a clock cycle and a pending READ command for data with a variably recurring access latency, a clock cycle count is adjusted. If a latency value has not been locked and if the READ command is a first READ command, the clock cycle count is stored as a locked latency value upon receiving a synchronized data available event (DQS for instance). Each subsequent READ command has an associated clock cycle count to enable pipelining wherein the clock cycle count for each READ starts incrementing when the individual READ command is issued. For subsequent READ commands, if the cycle count compares favorably with the locked latency value, data can be sampled safely from the interface at the identical latency for every READ request issued. The locked latency value can be read and/or written by software/hardware such that the read latency is consistent across multiple devices for reproducibility during debug.
摘要翻译：响应于具有可变重复访问延迟的数据的时钟周期和待处理的READ命令，调整时钟周期计数。如果延迟值未被锁定，并且READ命令是第一个READ命令，则在接收到同步数据可用事件（例如DQS）时，时钟周期计数被存储为锁定延迟值。每个随后的READ命令具有关联的时钟周期计数以启用流水线，其中当发出各个READ命令时，每个READ的时钟周期计数开始递增。对于随后的READ命令，如果循环计数与锁定的延迟值相比有利，则可以按照发出的每个READ请求以相同的等待时间从接口对数据进行安全采样。锁定的延迟值可以由软件/硬件读取和/或写入，使得读取延迟在多个设备之间保持一致，以便在调试期间重现。

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