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2. 发明申请

US20050220024A1 Virtual buffer size management system for the transmission of blocks of data bits in an HS-DSCH downlink channel of a mobile communications network 有权
标题翻译：用于在移动通信网络的HS-DSCH下行链路信道中传输数据比特块的虚拟缓冲器大小管理系统
公开(公告)号：US20050220024A1
公开(公告)日：2005-10-06
申请号：US11092728
申请日：2005-03-30
申请人： Pascal Agin , Remi Stefanini
发明人： Pascal Agin , Remi Stefanini
IPC分类号： H04L1/00 , H04L1/18 , H04Q7/28 , H04Q7/30 , H04L12/26 , H04L12/28
CPC分类号： H04L1/1819 , H04L1/0013 , H04L1/0065 , H04L1/0068
摘要： A system (D) is dedicated to managing the size of a virtual buffer (MTV) of a rate matching system (SOD) for matching the transmission bit rate of blocks of data bits in a set of HS-PDSCH physical channels associated with an HS-DSCH downlink transport channel and set up between a base station of a communications network and one or more user equipments. The system (SOD) comprises: i) a first rate matching stage (FRM) for matching the number of input bits coming from the HS-DSCH transport channel of a block to be transmitted to the equipment to a selected number of intermediate bits, ii) a virtual buffer (MTV) able to store the selected number of intermediate bits until reception by the base station in the context of an HARQ procedure of an acknowledgement indicating correct reception of the block by the equipment (UE), and iii) a second rate matching stage (SRM) for matching the selected number of intermediate bits to a number of output bits equal to the maximum number of bits that can be transmitted by the set. The system (D) is adapted to supply a selected number of intermediate bits such that the first stage (FRM) is able to match the number of input bits to the number of intermediate bits and the second stage (SRM) is able to match the number of intermediate bits to the number of output bits that can be transmitted by the set without adding any bits.
摘要翻译：系统（D）专用于管理速率匹配系统（SOD）的虚拟缓冲器（MTV）的大小，用于匹配与HS相关联的一组HS-PDSCH物理信道中的数据位块的传输比特率 -DSCH下行链路传输信道，并建立在通信网络的基站和一个或多个用户设备之间。系统（SOD）包括：i）第一速率匹配级（FRM），用于将来自要发射的块的HS-DSCH传输信道的输入比特数与所述设备匹配到选定数量的中间比特，ii ）虚拟缓冲器（MTV），其能够存储所选择的中间比特数，直到在指示由设备（UE）正确接收块的确认的HARQ过程的上下文中由基站接收，以及iii）第二速率匹配级（SRM），用于将所选择的中间比特数匹配到等于该组可发送的最大比特数的输出比特数。系统（D）适于提供所选数量的中间比特，使得第一级（FRM）能够将输入比特数与中间比特数匹配，并且第二级（SRM）能够匹配中间位数到可以由集合发送的输出位数，而不添加任何位。

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