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    • 1. 发明授权
    • Over temperature detection apparatus and method thereof
    • 过温度检测装置及其方法
    • US07650550B2
    • 2010-01-19
    • US11679242
    • 2007-02-27
    • Ravi RamaswamiMichael D. Bienek
    • Ravi RamaswamiMichael D. Bienek
    • G01R31/3177G01R31/40
    • G01R31/31707G01R31/31725G11C29/02G11C29/022G11C29/50012
    • A device is provided for detecting temperature-induced delays in a combinational logic path. A signal at the output of the logic path is latched at a first latch using a primary clock signal. The primary clock signal is delayed by a delay element to provide a delayed clock signal. The output of the logic path is latched at a second latch using the delayed clock signal. The delay element delays the clock signal by an amount that indicates the occurrence of an over-temperature condition at the logic path. A comparator compares the data latched at the first latch to the data latched at the second latch and provides an error signal indicative of an over-temperature condition if the first and second latch contain different data values.
    • 提供了用于检测组合逻辑路径中的温度引起的延迟的装置。 使用主时钟信号在逻辑路径的输出处的信号在第一锁存器处被锁存。 主时钟信号被延迟元件延迟以提供延迟的时钟信号。 使用延迟的时钟信号将逻辑路径的输出锁存在第二锁存器。 延迟元件将时钟信号延迟指示在逻辑路径处发生过温度条件的量。 比较器将在第一锁存器处锁存的数据与锁存在第二锁存器上的数据进行比较,并且如果第一和第二锁存器包含不同的数据值,则提供指示过温度条件的错误信号。
    • 2. 发明授权
    • Device and method for testing of digital-to-analog converter
    • 数模转换器测试装置及方法
    • US07609190B1
    • 2009-10-27
    • US12107502
    • 2008-04-22
    • Ravi RamaswamiMichael A. BourlandFeng Zhao
    • Ravi RamaswamiMichael A. BourlandFeng Zhao
    • H03M1/66
    • H03M1/1095H03M1/742
    • A current-steering digital-to-analog converter (DAC) is tested using a test component having a relaxation oscillator with an oscillation frequency based on the output current of the DAC. A series of test values is provided in sequence to the DAC for conversion to an output current with a magnitude that varies with the test values. The test component counts the number of oscillations (“the oscillation count”) of the relaxation oscillator over a fixed duration that is substantially equal for each test value. As the number of oscillations over the fixed duration depends on the oscillation frequency of the relaxation oscillator, which in turn is based on the magnitude of the output current, the oscillation count can be used as a relative measure of the magnitude of the output current for the corresponding test value. Accordingly, the oscillation counts for the test values can be used to determine operational characteristics of the DAC.
    • 使用具有基于DAC的输出电流的振荡频率的张弛振荡器的测试部件来测试电流导向数模转换器(DAC)。 一系列测试值依次提供给DAC,用于转换为具有随测试值变化的幅度的输出电流。 测试组件对固定持续时间计数弛豫振荡器的振荡次数(“振荡计数”),其对于每个测试值基本相等。 由于在固定持续时间内的振荡次数取决于张弛振荡器的振荡频率,而振荡器的振荡频率又依赖于输出电流的大小,所以振荡计数可以用作输出电流幅值的相对量度 相应的测试值。 因此,可以使用测试值的振荡计数来确定DAC的工作特性。
    • 4. 发明申请
    • DEVICE AND METHOD FOR TESTING OF DIGITAL-TO-ANALOG CONVERTER
    • 用于测试数字到模拟转换器的设备和方法
    • US20090261999A1
    • 2009-10-22
    • US12107502
    • 2008-04-22
    • Ravi RamaswamiMichael A. BourlandFeng Zhao
    • Ravi RamaswamiMichael A. BourlandFeng Zhao
    • H03M1/10
    • H03M1/1095H03M1/742
    • A current-steering digital-to-analog converter (DAC) is tested using a test component having a relaxation oscillator with an oscillation frequency based on the output current of the DAC. A series of test values is provided in sequence to the DAC for conversion to an output current with a magnitude that varies with the test values. The test component counts the number of oscillations (“the oscillation count”) of the relaxation oscillator over a fixed duration that is substantially equal for each test value. As the number of oscillations over the fixed duration depends on the oscillation frequency of the relaxation oscillator, which in turn is based on the magnitude of the output current, the oscillation count can be used as a relative measure of the magnitude of the output current for the corresponding test value. Accordingly, the oscillation counts for the test values can be used to determine operational characteristics of the DAC.
    • 使用具有基于DAC的输出电流的振荡频率的张弛振荡器的测试部件来测试电流导向数模转换器(DAC)。 一系列测试值依次提供给DAC,用于转换为具有随测试值变化的幅度的输出电流。 测试组件对固定持续时间计数弛豫振荡器的振荡次数(“振荡计数”),其对于每个测试值基本相等。 由于在固定持续时间内的振荡次数取决于张弛振荡器的振荡频率,而振荡器的振荡频率又依赖于输出电流的大小,所以振荡计数可以用作输出电流幅值的相对量度 相应的测试值。 因此,可以使用测试值的振荡计数来确定DAC的工作特性。
    • 5. 发明授权
    • Multi-bank scheduling to improve performance on tree accesses in a DRAM based random access memory subsystem
    • 多库调度,以提高基于DRAM的随机存取存储器子系统中树访问的性能
    • US06839797B2
    • 2005-01-04
    • US10026352
    • 2001-12-21
    • Mauricio CalleRavi Ramaswami
    • Mauricio CalleRavi Ramaswami
    • G06F12/06G06F12/00G06F12/02G06F12/08G06F13/16G11C7/00
    • G06F13/1647Y02D10/14
    • A method and system of memory management incorporates multiple banks of memory devices organized into independent channels wherein each bank of memory devices contains duplicate data. A tree memory controller controls data read and write accesses to each of the banks in each of the channels. A bank queue for each bank in each channel keeps track of bank availability. When read or write requests are received at the tree memory controller, the controller checks the availability of each bank in a channel, identifies a first available bank, and executes the read request from the first available bank. In response to a write request, the controller blocks all read requests once it has confirmed that data to be written is complete for the selected memory word length. As soon as each bank queue for read requests is empty, the controller initiates burst mode transfer of the completed data word to all banks concurrently.
    • 存储器管理的方法和系统将多组存储器件组合成独立的通道,其中每一组存储器件都包含重复的数据。 树存储器控制器控制对每个通道中的每个存储体的数据读取和写入访问。 每个渠道中的每个银行的银行排队跟踪银行的可用性。 当在树存储器控制器处接收到读或写请求时,控制器检查通道中每个存储体的可用性,识别第一可用存储体,并从第一可用存储体执行读请求。 响应于写入请求,控制器一旦确认要写入的数据对于所选择的存储器字长度是完整的则阻止所有读取请求。 每个读取请求队列一旦为空,控制器就会同时发起完整数据字的突发模式传输到所有存储库。
    • 7. 发明申请
    • OVER TEMPERATURE DETECTION APPARATUS AND METHOD THEREOF
    • 超温度检测装置及其方法
    • US20080209291A1
    • 2008-08-28
    • US11679242
    • 2007-02-27
    • Ravi RamaswamiMichael D. Bienek
    • Ravi RamaswamiMichael D. Bienek
    • G01R31/28
    • G01R31/31707G01R31/31725G11C29/02G11C29/022G11C29/50012
    • A device is provided for detecting delays of data due to over-temperature conditions, the device includes a first latch having a data input and a clock input and an output, and a first delay path including combinational logic, a first input coupled to the output of the first latch, and an output. The device further includes a second latch having a data input coupled to the output of the first delay path, a clock input coupled to the clock input of first latch, and an output, and a delay element having a data input coupled to the clock input of the first latch and an output. The device includes a third latch having a data input coupled to the output of the first delay path, a clock input coupled to the output of the delay element, and an output, and a comparator having a first input coupled to the output of the second latch, a second input coupled to the output of the third latch, and an output.
    • 提供了一种用于检测由于过温条件引起的数据延迟的装置,该装置包括具有数据输入和时钟输入和输出的第一锁存器,以及包括组合逻辑的第一延迟路径,耦合到输出端的第一输入 的第一个锁存器和一个输出端。 该装置还包括第二锁存器,其具有耦合到第一延迟路径的输出的数据输入,耦合到第一锁存器的时钟输入的时钟输入和输出以及具有耦合到时钟输入的数据输入的延迟元件 的第一个锁存器和一个输出。 该装置包括第三锁存器,其具有耦合到第一延迟路径的输出的数据输入,耦合到延迟元件的输出的时钟输入和输出,以及具有耦合到第二延迟元件的输出的第一输入的比较器 锁存器,耦合到第三锁存器的输出的第二输入端和输出端。
    • 10. 发明授权
    • High-efficiency polycrystalline silicon resistor system for use in a thermal inkjet printhead
    • 用于热喷墨打印头的高效多晶硅电阻系统
    • US06267471B1
    • 2001-07-31
    • US09427512
    • 1999-10-26
    • Ravi RamaswamiVictor JosephMin Cao
    • Ravi RamaswamiVictor JosephMin Cao
    • B41J205
    • B41J2/1645B41J2/14129B41J2/1601B41J2/1623B41J2/1628B41J2/1631B41J2/1642B41J2/1646
    • A highly-efficient thermal inkjet printhead. The printhead includes at least one doped polycrystalline silicon resistor which communicates with an external signal source using a unique interconnection system. Specifically, a primary layer of electrically conductive material (optimally a metal silicide) is connected to the resistor. An additional layer of electrically conductive material is attached to and above the primary layer. The additional layer terminates at a position which is spaced outwardly and apart from the resistor to form a gap therebetween. However, the underlying primary layer electrically links the additional layer to the resistor. Alternatively, a dielectric layer is attached to and above the primary layer, with the additional layer being secured to the dielectric layer. At least one electrically conductive contact member is provided within the dielectric layer to link the primary and additional layers. These systems provide improved reliability, greater dimensional simplicity, and optimized electrical/thermal properties.
    • 高效热敏打印头。 打印头包括至少一个掺杂的多晶硅电阻器,其使用独特的互连系统与外部信号源进行通信。 具体地,导电材料的主要层(最好是金属硅化物)连接到电阻器。 另外一层导电材料附着到主层上方。 附加层终止于与电阻器间隔开并与电阻器分开的位置,以在它们之间形成间隙。 然而,底层主层将附加层电连接到电阻器。 或者,电介质层附接到主层上方并且在主层上方,附加层固定到电介质层。 在电介质层内提供至少一个导电接触构件以连接主层和附加层。 这些系统提供改进的可靠性,更大的尺寸简单性和优化的电/热性能。