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    • 10. 发明授权
    • Reconfigurable key-in-storage means for protecting interleaved main
storage
    • 用于保护交错主存储器的可重配置密钥存储装置
    • US4293910A
    • 1981-10-06
    • US54350
    • 1979-07-02
    • Frederick O. FluscheKwang G. TanRalph W. Wright
    • Frederick O. FluscheKwang G. TanRalph W. Wright
    • G06F12/00G06F12/06G06F12/14G06F15/16G06F15/177G11C7/00G08B29/00
    • G06F12/1466
    • The disclosure provides a storage protection (SP) array in each of two system controllers (SCs) in a multiprocessing system which has a shared main storage containing a plurality of basic storage modules (BSMs). The BSMs may be operated with block and page interleaved addresses. Each block in main storage is assigned a key-in-storage having an entry in one of the two arrays.A cross-interrogate (XI) bus connects between the SCs. Using the XI bus, each processor request is sent to an SP address register in every SP array.Each array is divided into a plurality of equal groups. Each group has a range identifier register and a comparator. The range identifier register is loaded with a value which controls the range of main storage addresses to which the group is assigned. All of the comparators in each array are connected to a high-order part of the SP address register for the array.The range identifier registers in all of the groups in both arrays are assigned different values which cover the entire address range of main storage, and only one array need contain a particular key-in-storage. A BSM bit and a page bit in the processor request address are put into the high-order field of the SP address register to control the selection of a group, so that alternate pages have their keys-in-storage put in different groups in a pair of groups in a SP array.Key-in-storage accesses may be overlapped between different groups in an array.When a request received from the XI bus has its key-in-storage found in one array, the key-in-storage is transmitted on the XI bus to the SC which sent the request.
    • 本公开提供了具有包含多个基本存储模块(BSM)的共享主存储器的多处理系统中的两个系统控制器(SC)中的每一个中的存储保护(SP)阵列。 BSM可以以块和页交织地址来操作。 在主存储器中的每个块被分配有在两个阵列中的一个阵列中具有条目的密钥存储器。 交叉询问(XI)总线连接在SC之间。 使用XI总线,每个处理器请求都会发送到每个SP阵列的SP地址寄存器。 每个阵列被分成多个相等的组。 每个组都有一个范围标识符寄存器和一个比较器。 范围标识符寄存器加载一个值,该值控制分配给组的主存储地址的范围。 每个阵列中的所有比较器都连接到阵列的SP地址寄存器的高阶部分。 两个阵列中所有组中的范围标识符寄存器都分配不同的值,覆盖主存储的整个地址范围,只有一个阵列需要包含特定的存储密钥。 处理器请求地址中的BSM位和页位被放入SP地址寄存器的高位字段中以控制组的选择,使得备用页将它们的存储键放在不同的组中 SP阵列中的一对组。 密钥存储访问可能在数组中的不同组之间重叠。 当从XI总线接收到的请求具有在一个阵列中存储的密钥存储时,密钥存储在XI总线上发送到发送请求的SC。