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    • 3. 发明授权
    • Method for accessing address features of communication subscribers when
sending data packets
    • 发送数据包时访问通信用户的地址特征的方法
    • US5477537A
    • 1995-12-19
    • US223858
    • 1994-04-06
    • Uwe DankertRainer Storn
    • Uwe DankertRainer Storn
    • H04L29/06H04L12/56
    • H04L29/06
    • A method for rapidly accessing address features of communication subscribers, in particular, when reading data packets is provided. Performance features of the communication connection are deposited in tables in the form of addresses that must be successively searched. A large address area from which a sub-set of addresses is used, is compressed onto a compressed address area of the same size as the sub-set of the addresses used, thereby obtaining miniaturized addresses. Since a plurality of tables must be searched per address entry, different tables to be checked are activated via offsets proceeding from the compressed address area. The communication load for the address transfer is reduced as a result and a shortened calculating time is achieved in comparison to a hash addressing.
    • 特别是在读取数据分组时,快速访问通信用户的地址特征的方法。 通信连接的性能特征以表格的形式存储在必须连续搜索的地址中。 将使用了一组地址的大地址区域压缩到与所使用的地址的子集相同大小的压缩地址区域,从而获得小型化的地址。 由于每个地址条目必须搜索多个表格,所以要通过从压缩地址区域进行的偏移激活要检查的不同表格。 因此,减少了地址传送的通信负载,并且与散列寻址相比,实现了缩短的计算时间。
    • 6. 发明授权
    • Monolithically integrated data memory arrangement and method for the
operation thereof
    • 一体化数据存储器布置及其操作方法
    • US5396470A
    • 1995-03-07
    • US185243
    • 1994-01-24
    • Rainer Storn
    • Rainer Storn
    • G06F12/02G06F17/30G11C13/00
    • G06F17/30949G06F17/30982
    • In a memory arrangement and operating method therefor which enables an accelerated table search, an address generator, which operates according to a hash method, and an addressable memory are, integrated on a chip. A further advantage is achieved when the address generator is programmable, so that the hash method can be variably prescribed. A further acceleration is achieved when a CRC method is utilized for the calculation of the hash addresses and when intermediate results of the polynomial division are stored in tables. Two advantages are thus exploited. One advantage is an increase in speed due to the integration, and the further advantage is an increase in speed due to the accelerated polynomial division, as well as the high access hit rates inherent in the hash method.
    • 在其中集成了芯片上的能够进行加速表搜索的存储器布置和操作方法,根据散列方法操作的地址生成器和可寻址存储器。 当地址发生器是可编程的时,实现另外的优点,使得可以可变地规定散列方法。 当使用CRC方法来计算散列地址并且当多项式除法的中间结果存储在表中时,实现进一步的加速。 因此利用两个优点。 一个优点是由于集成而导致速度增加,并且另外的优点是由于加速多项式除法而导致的速度增加,以及散列方法中固有的高访问命中率。