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1. 发明授权

US08527253B2 Modeling an arbitrarily polarized illumination source in an optical lithography system 有权
标题翻译：在光学光刻系统中建模任意偏振的照明光源
公开(公告)号：US08527253B2
公开(公告)日：2013-09-03
申请号：US11851021
申请日：2007-09-06
申请人： Qiaolin Zhang , Hua Song
发明人： Qiaolin Zhang , Hua Song
IPC分类号： G06F17/50
CPC分类号： G03F7/70566 , G03F1/36 , G03F7/70091 , G03F7/70441 , G03F7/705
摘要： One embodiment of the present invention provides a system that accurately models polarization states of an illumination source in an optical lithography system for manufacturing integrated circuits. During operation, the system starts by receiving a two-dimensional (2D) grid map for an illumination source pupil in the optical lithography system. The system then constructs a source-polarization model for the illumination source by defining a polarization state at each grid point in the grid map. Next, the system enhances a lithography model for the optical lithography system by incorporating the source-polarization model into the lithography/OPC model.
摘要翻译：本发明的一个实施例提供了一种在用于制造集成电路的光学光刻系统中精确地模拟照明源的偏振状态的系统。在操作期间，系统通过接收光刻系统中的照明源光瞳的二维（2D）网格图开始。然后，该系统通过在网格图中的每个网格点处定义偏振状态来为照明源构建源偏振模型。接下来，该系统通过将源偏振模型结合到光刻/ OPC模型中来增强光刻系统的光刻模型。

2. 发明授权

US07681172B2 Method and apparatus for modeling an apodization effect in an optical lithography system 有权
标题翻译：用于对光学光刻系统中的变迹效应进行建模的方法和装置
公开(公告)号：US07681172B2
公开(公告)日：2010-03-16
申请号：US11699805
申请日：2007-01-29
申请人： Qiaolin Zhang , Paul VanAdrichem , Laurent Depre , Qiliang Yan
发明人： Qiaolin Zhang , Paul VanAdrichem , Laurent Depre , Qiliang Yan
IPC分类号： G06F17/50 , G03F1/00 , G03C5/00
CPC分类号： G03F7/70216 , G03F7/705
摘要： One embodiment of the present invention provides a system that accurately predicts an apodization effect in an optical lithography system for manufacturing an integrated circuit. During operation, the system starts by collecting an apodization-effect-induced spatial transmission profile from the optical lithography system. The system then constructs an apodization model based on the spatial transmission profile. Next, the system enhances a lithography model for the optical lithography system by incorporating the apodization model into the lithography model, wherein the enhanced lithography model accurately predicts the effects of apodization on the optical lithography system.
摘要翻译：本发明的一个实施例提供了一种准确预测用于制造集成电路的光学光刻系统中的变迹效应的系统。在操作期间，系统通过从光刻系统收集变迹效应引起的空间传播轮廓来开始。然后，该系统基于空间传输概况构建一个变迹模型。接下来，该系统通过将切割模型结合到光刻模型中来增强光刻系统的光刻模型，其中增强光刻模型准确地预测变迹对光刻系统的影响。

3. 发明申请

US20090070083A1 MODELING AN ARBITRARILY POLARIZED ILLUMINATION SOURCE IN AN OPTICAL LITHOGRAPHY SYSTEM 有权
标题翻译：在光学平版印刷系统中建立棱镜极化照明源
公开(公告)号：US20090070083A1
公开(公告)日：2009-03-12
申请号：US11851021
申请日：2007-09-06
申请人： Qiaolin Zhang , Hua Song
发明人： Qiaolin Zhang , Hua Song
IPC分类号： G06G7/48
CPC分类号： G03F7/70566 , G03F1/36 , G03F7/70091 , G03F7/70441 , G03F7/705
摘要： One embodiment of the present invention provides a system that accurately models polarization states of an illumination source in an optical lithography system for manufacturing integrated circuits. During operation, the system starts by receiving a two-dimensional (2D) grid map for an illumination source pupil in the optical lithography system. The system then constructs a source-polarization model for the illumination source by defining a polarization state at each grid point in the grid map. Next, the system enhances a lithography model for the optical lithography system by incorporating the source-polarization model into the lithography/OPC model.
摘要翻译：本发明的一个实施例提供了一种在用于制造集成电路的光学光刻系统中精确地模拟照明源的偏振状态的系统。在操作期间，系统通过接收光刻系统中的照明源光瞳的二维（2D）网格图开始。然后，该系统通过在网格图中的每个网格点处定义偏振状态来为照明源构建源偏振模型。接下来，该系统通过将源偏振模型结合到光刻/ OPC模型中来增强光刻系统的光刻模型。

4. 发明申请

US20080184192A1 Method and apparatus for modeling an apodization effect in an optical lithography system 有权
标题翻译：用于对光学光刻系统中的变迹效应进行建模的方法和装置
公开(公告)号：US20080184192A1
公开(公告)日：2008-07-31
申请号：US11699805
申请日：2007-01-29
申请人： Qiaolin Zhang , Paul VanAdrichem , Laurent Depre , Qiliang Yan
发明人： Qiaolin Zhang , Paul VanAdrichem , Laurent Depre , Qiliang Yan
IPC分类号： G06F17/50
CPC分类号： G03F7/70216 , G03F7/705
摘要： One embodiment of the present invention provides a system that accurately predicts an apodization effect in an optical lithography system for manufacturing an integrated circuit. During operation, the system starts by collecting an apodization-effect-induced spatial transmission profile from the optical lithography system. The system then constructs an apodization model based on the spatial transmission profile. Next, the system enhances a lithography model for the optical lithography system by incorporating the apodization model into the lithography model, wherein the enhanced lithography model accurately predicts the effects of apodization on the optical lithography system.
摘要翻译：本发明的一个实施例提供了一种准确预测用于制造集成电路的光学光刻系统中的变迹效应的系统。在操作期间，系统通过从光刻系统收集变迹效应引起的空间传播轮廓来开始。然后，该系统基于空间传输概况构建一个变迹模型。接下来，该系统通过将切割模型结合到光刻模型中来增强光刻系统的光刻模型，其中增强光刻模型准确地预测变迹对光刻系统的影响。

5. 发明授权

US08423917B2 Modeling thin-film stack topography effect on a photolithography process 有权
标题翻译：在光刻工艺上建模薄膜堆叠地形效应
公开(公告)号：US08423917B2
公开(公告)日：2013-04-16
申请号：US12512677
申请日：2009-07-30
申请人： Hua Song , James P. Shiely , Qiaolin Zhang
发明人： Hua Song , James P. Shiely , Qiaolin Zhang
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/00 , G03F1/70
摘要： One embodiment of the present invention provides a system that determines image intensity at a location in a photoresist (PR) layer on a wafer. During operation, the system receives a set of masks which were used to generate one or more patterned layers of a multilayer structure on the wafer, wherein a patterned layer includes a set of reflectors on a top surface of the patterned layer, which correspond to patterns in a patterned-layer mask in the set of masks, wherein a reflector reflects light from a light source during a photolithography process. The system then generates a first virtual mask based on the first mask and the patterned-layer mask, wherein the first virtual mask uses a clear area to model a reflector in the set of reflectors. Next, the system determines the image intensity value at the location on the PR layer based at least on the first mask and the first virtual mask.
摘要翻译：本发明的一个实施例提供一种确定晶片上的光致抗蚀剂（PR）层中的位置处的图像强度的系统。在操作期间，系统接收用于在晶片上产生多层结构的一个或多个图案化层的一组掩模，其中图案化层包括在图案化层的顶表面上的一组反射器，其对应于图案在该组掩模中的图案层掩模中，其中反射器在光刻工艺期间反射来自光源的光。然后，系统基于第一掩模和图案层掩模生成第一虚拟掩模，其中第一虚拟掩模使用清晰区域对反射器组中的反射器进行建模。接下来，系统至少基于第一掩模和第一虚拟掩码来确定PR层上的位置处的图像强度值。

6. 发明申请

US20100058280A1 BULK IMAGE MODELING FOR OPTICAL PROXIMITY CORRECTION 有权
标题翻译：用于光学近似校正的大容量图像建模
公开(公告)号：US20100058280A1
公开(公告)日：2010-03-04
申请号：US12200523
申请日：2008-08-28
申请人： Yongfa Fan , Qiaolin Zhang , Bradley John Falch
发明人： Yongfa Fan , Qiaolin Zhang , Bradley John Falch
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： A method is described herein for predicting lateral position information about a feature represented in an integrated circuit layout for use with an integrated circuit fabrication process, where the process projects an image onto a resist. The method includes providing a lateral distribution of intensity values of the image at different depths with the resist. Next, the lateral position of an edge point of the feature is predicted in dependence upon a particular resist development time, and further in dependence upon the image intensity values at more than one depth within the resist.
摘要翻译：本文描述了一种用于预测关于在集成电路布局中表示的特征的横向位置信息的方法，用于集成电路制造过程，其中该过程将图像投影到抗蚀剂上。该方法包括提供与抗蚀剂不同深度的图像的强度值的横向分布。接下来，根据特定的抗蚀剂显影时间来预测特征的边缘点的横向位置，并且进一步根据抗蚀剂内多于一个深度处的图像强度值。

7. 发明授权

US07334202B1 Optimizing critical dimension uniformity utilizing a resist bake plate simulator 有权
标题翻译：使用抗蚀剂烘烤板模拟器优化临界尺寸均匀性
公开(公告)号：US07334202B1
公开(公告)日：2008-02-19
申请号：US11145327
申请日：2005-06-03
申请人： Bhanwar Singh , Qiaolin Zhang , Iraj Emami , Joyce S. Oey Hewett , Luigi Capodiece
发明人： Bhanwar Singh , Qiaolin Zhang , Iraj Emami , Joyce S. Oey Hewett , Luigi Capodiece
IPC分类号： G06F17/50
CPC分类号： G06F17/5018 , G03F7/38 , G06F2217/80
摘要： A system for optimizing critical dimension uniformity in semiconductor manufacturing processes is provided. The system comprises a bake plate simulator to model a physical bake plate. A finite element analysis engine uses information from the bake plate simulator to calculate missing information. A lithography simulator predicts outcomes of a lithography process using information from the bake plate simulator and the finite element analysis engine. The system can be used in a predictive capacity or as part of a process control system.
摘要翻译：提供了一种用于优化半导体制造工艺中的关键尺寸均匀性的系统。该系统包括用于对物理烘烤板进行建模的烤盘模拟器。有限元分析引擎使用来自烘烤板模拟器的信息来计算缺失的信息。光刻模拟器使用来自烘烤板模拟器和有限元分析引擎的信息来预测光刻工艺的结果。该系统可以以预测能力使用或作为过程控制系统的一部分使用。

8. 发明授权

US08196068B2 Modeling critical-dimension (CD) scanning-electron-microscopy (CD-SEM) CD extraction 有权
标题翻译：建模临界尺寸（CD）扫描电子显微镜（CD-SEM）CD提取
公开(公告)号：US08196068B2
公开(公告)日：2012-06-05
申请号：US12387383
申请日：2009-04-30
申请人： Qiaolin Zhang
发明人： Qiaolin Zhang
IPC分类号： G06F17/50 , G06F19/00 , G03F1/00 , G21K5/00 , G06K9/00
CPC分类号： G03F7/70441 , G03F7/705 , G03F7/70625
摘要： One embodiment of the present invention relates to a process that models critical-dimension (CD) scanning-electron-microscopy (CD-SEM) extraction during photolithography process model calibration. During operation, the process receives measured CD values which were obtained using a CD-SEM extraction process, wherein the CD-SEM extraction process determines a measured CD value for a feature by measuring multiple CD values of the feature along multiple electron beam scans. The process then determines simulated CD values, wherein a simulated CD value is determined based at least on a set of CD extraction cut-lines evenly placed around the target feature. During subsequent photolithography process model calibration, the process fits a parameter that models an aspect of the photolithography process based at least on both the measured CD values and the simulated CD values.
摘要翻译：本发明的一个实施方案涉及在光刻过程模型校准期间模拟临界尺寸（CD）扫描电子显微镜（CD-SEM）提取的方法。在操作期间，该过程接收使用CD-SEM提取过程获得的测量的CD值，其中CD-SEM提取过程通过沿多个电子束扫描测量特征的多个CD值来确定特征的测量CD值。该过程然后确定模拟CD值，其中至少基于均匀放置在目标特征周围的一组CD提取剪切线来确定模拟CD值。在随后的光刻过程模型校准期间，该过程适合于至少基于测量的CD值和模拟的CD值两者来模拟光刻工艺的一个方面的参数。

9. 发明授权

US08006203B2 Bulk image modeling for optical proximity correction 有权
标题翻译：用于光学邻近校正的批量图像建模
公开(公告)号：US08006203B2
公开(公告)日：2011-08-23
申请号：US12200523
申请日：2008-08-28
申请人： Yongfa Fan , Qiaolin Zhang , Bradley J. Falch
发明人： Yongfa Fan , Qiaolin Zhang , Bradley J. Falch
IPC分类号： G06F17/50 , G06F19/00 , G03F1/00 , G21K5/00 , G06K9/00
CPC分类号： G03F1/36
摘要： A method is described herein for predicting lateral position information about a feature represented in an integrated circuit layout for use with an integrated circuit fabrication process, where the process projects an image onto a resist. The method includes providing a lateral distribution of intensity values of the image at different depths with the resist. Next, the lateral position of an edge point of the feature is predicted in dependence upon a particular resist development time, and further in dependence upon the image intensity values at more than one depth within the resist.
摘要翻译：本文描述了一种用于预测关于在集成电路布局中表示的特征的横向位置信息的方法，用于集成电路制造过程，其中该过程将图像投影到抗蚀剂上。该方法包括提供与抗蚀剂不同深度的图像的强度值的横向分布。接下来，根据特定的抗蚀剂显影时间来预测特征的边缘点的横向位置，并且进一步根据抗蚀剂内多于一个深度处的图像强度值。

10. 发明申请

US20100280812A1 Modeling critical-dimension (CD) scanning-electron-microscopy (CD-SEM) CD extraction 有权
标题翻译：建模临界尺寸（CD）扫描电子显微镜（CD-SEM）CD提取
公开(公告)号：US20100280812A1
公开(公告)日：2010-11-04
申请号：US12387383
申请日：2009-04-30
申请人： Qiaolin Zhang
发明人： Qiaolin Zhang
IPC分类号： G06G7/62
CPC分类号： G03F7/70441 , G03F7/705 , G03F7/70625
摘要： One embodiment of the present invention relates to a process that models critical-dimension (CD) scanning-electron-microscopy (CD-SEM) extraction during photolithography process model calibration. During operation, the process receives measured CD values which were obtained using a CD-SEM extraction process, wherein the CD-SEM extraction process determines a measured CD value for a feature by measuring multiple CD values of the feature along multiple electron beam scans. The process then determines simulated CD values, wherein a simulated CD value is determined based at least on a set of CD extraction cut-lines evenly placed around the target feature. During subsequent photolithography process model calibration, the process fits a parameter that models an aspect of the photolithography process based at least on both the measured CD values and the simulated CD values.
摘要翻译：本发明的一个实施方案涉及在光刻过程模型校准期间模拟临界尺寸（CD）扫描电子显微镜（CD-SEM）提取的方法。在操作期间，该过程接收使用CD-SEM提取过程获得的测量的CD值，其中CD-SEM提取过程通过沿多个电子束扫描测量特征的多个CD值来确定特征的测量CD值。该过程然后确定模拟CD值，其中至少基于均匀放置在目标特征周围的一组CD提取剪切线来确定模拟CD值。在随后的光刻过程模型校准期间，该过程适合于至少基于测量的CD值和模拟的CD值两者来模拟光刻工艺的一个方面的参数。

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