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1. 发明申请

US20060160290A1 Method to fabricate variable work function gates for FUSI devices 有权
标题翻译：为FUSI设备制造可变功能门的方法
公开(公告)号：US20060160290A1
公开(公告)日：2006-07-20
申请号：US11039428
申请日：2005-01-20
申请人： Yung Chong , Dong Sohn , Chew-Hue Ang , Purakh Vermo , Liang Hsia
发明人： Yung Chong , Dong Sohn , Chew-Hue Ang , Purakh Vermo , Liang Hsia
IPC分类号： H01L21/8238
CPC分类号： H01L21/823814 , H01L21/823835 , H01L21/823842
摘要： An embodiment of fabrication of a variable work function gates in a FUSI device is described. The embodiment uses a work function doping implant to dope the polysilicon to achieve a desired work function. Selective epitaxy growth (SEG) is used to form silicon over the source/drain regions. The doped poly-Si gate is fully silicided to form fully silicided gates that have a desired work function. We provide a substrate having a NMOS region and a PMOS region. We form a gate dielectric layer and a gate layer over said substrate. We perform a (gate Vt) gate layer implant process to implant impurities such as P+, As+, B+, BF2+, N+, Sb+, In+, C+, Si+, Ge+ or Ar+ into the gate layer gate in the NMOS gate regions and said PMOS gate regions. We form a cap layer over said gate layer. We pattern said cap layer, said gate layer and said gate dielectric layer to form a NMOS gate and a PMOS gate. Spacers are formed and S/D regions are formed. A metal is deposited over said substrate surface. We anneal said metal layer to form fully silicided NMOS gate and fully silicided PMOS gate.
摘要翻译：描述了在FUSI设备中制造可变功函数门的实施例。该实施例使用功函数掺杂注入来掺杂多晶硅以实现所需的功函数。选择性外延生长（SEG）用于在源极/漏极区域上形成硅。掺杂的多晶硅栅极被完全硅化以形成具有所需功函数的完全硅化栅极。我们提供具有NMOS区和PMOS区的衬底。我们在所述衬底上形成栅极介电层和栅极层。我们进行（栅极Vt）栅极层注入工艺，将诸如P +，As +，B +，BF 2 +，N +，Sb +，In +，C +，Si +，Ge +或Ar +的杂质注入栅极层 NMOS栅极区域和所述PMOS栅极区域中的栅极。我们在所述栅极层上形成覆盖层。我们对所述盖层，所述栅极层和所述栅极电介质层进行图案化以形成NMOS栅极和PMOS栅极。形成间隔物并形成S / D区域。在所述衬底表面上沉积金属。我们退火所述金属层以形成完全硅化的NMOS栅极和完全硅化的PMOS栅极。

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