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    • 5. 发明授权
    • Methods for optimizing memory unit usage to maximize packet throughput for multi-processor multi-threaded architectures
    • 用于优化存储单元使用以最大化多处理器多线程架构的数据包吞吐量的方法
    • US07373475B2
    • 2008-05-13
    • US11157711
    • 2005-06-21
    • Paul BurkleyPrashant Chandra
    • Paul BurkleyPrashant Chandra
    • G06F12/00
    • G06F12/023
    • Methods for optimizing memory unit usage to maximize packet throughput for a multiprocessor multithreaded architecture. One method employs a first phase of a software algorithm to allocate data structures to memory units in which the data units are stored and accessed during processing operations. The allocation is such that the data structures are allocated to memory units having lower latencies while satisfying capacity and bandwidth constraints for the memory units. A second phase of the algorithm may be employed to tune the allocation, wherein the performance level of an initial allocation and subsequent reallocations are simulated for an environment in which the memory units and data structures are to be implemented. From the simulation, the allocation providing the best performance level is selected. The simulated environment may include network processor unit (NPU) environments, with the performance level comprising a measure of packet throughput.
    • 用于优化存储单元使用以最大化多处理器多线程架构的数据包吞吐量的方法。 一种方法采用软件算法的第一阶段来将数据结构分配给在处理操作期间存储和访问数据单元的存储器单元。 该分配使得数据结构被分配给具有较低延迟的存储单元,同时满足存储器单元的容量和带宽限制。 可以采用该算法的第二阶段来调整分配,其中针对要实现存储器单元和数据结构的环境来模拟初始分配和后续重新分配的性能水平。 从模拟中,选择提供最佳性能水平的分配。 模拟环境可以包括网络处理器单元(NPU)环境,其中性能级别包括分组吞吐量的量度。
    • 8. 发明申请
    • Methods for optimizing memory unit usage to maximize packet throughput for multi-processor multi-threaded architectures
    • 用于优化存储单元使用以最大化多处理器多线程架构的数据包吞吐量的方法
    • US20070005925A1
    • 2007-01-04
    • US11157711
    • 2005-06-21
    • Paul BurkleyPrashant Chandra
    • Paul BurkleyPrashant Chandra
    • G06F12/00G06F13/28
    • G06F12/023
    • Methods for optimizing memory unit usage to maximize packet throughput for a multiprocessor multithreaded architecture. One method employs a first phase of a software algorithm to allocate data structures to memory units in which the data units are stored and accessed during processing operations. The allocation is such that the data structures are allocated to memory units having lower latencies while satisfying capacity and bandwidth constraints for the memory units. A second phase of the algorithm may be employed to tune the allocation, wherein the performance level of an initial allocation and subsequent reallocations are simulated for an environment in which the memory units and data structures are to be implemented. From the simulation, the allocation providing the best performance level is selected. The simulated environment may include network processor unit (NPU) environments, with the performance level comprising a measure of packet throughput.
    • 用于优化存储单元使用以最大化多处理器多线程架构的数据包吞吐量的方法。 一种方法采用软件算法的第一阶段来将数据结构分配给在处理操作期间存储和访问数据单元的存储器单元。 该分配使得数据结构被分配给具有较低延迟的存储单元,同时满足存储器单元的容量和带宽限制。 可以采用该算法的第二阶段来调整分配,其中针对要实现存储器单元和数据结构的环境来模拟初始分配和后续重新分配的性能水平。 从模拟中,选择提供最佳性能水平的分配。 模拟环境可以包括网络处理器单元(NPU)环境,其中性能级别包括分组吞吐量的量度。