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    • 3. 发明申请
    • Portable LED interactive learning device
    • 便携式LED交互式学习装置
    • US20100248203A1
    • 2010-09-30
    • US12382879
    • 2009-03-26
    • Kuo Hsiing ChoPing Hung TsaiChin-I Liu
    • Kuo Hsiing ChoPing Hung TsaiChin-I Liu
    • G09B5/00
    • G09B5/02
    • The present invention discloses a portable LED interactive learning device for generating a series of displays to underage kids and method thereof. The portable LED interactive learning device in the present invention includes a motion detecting device, a tilt detecting device, a micro processer, and a LED set. The portable LED interactive learning device can detect the user's motion and demonstrate a corresponding figure on the LED set. The user can further select the function of playing game or drawing chart based on the memory capacity of the present invention. By using LED display system, the present invention can provide a comparable lower price device for kid's learning development.
    • 本发明公开了一种便携式LED交互式学习装置,用于生成未成年子女的一系列显示器及其方法。 本发明的便携式LED交互式学习装置包括运动检测装置,倾斜检测装置,微处理器和LED组。 便携式LED交互式学习装置可以检测用户的动作,并在LED组上展示相应的图形。 用户可以基于本发明的存储器容量进一步选择玩游戏或绘图的功能。 通过使用LED显示系统,本发明可以为孩子的学习发展提供可比较的较低价格的装置。
    • 4. 发明授权
    • Low voltage programming in NAND flash
    • NAND闪存中的低电压编程
    • US08947939B2
    • 2015-02-03
    • US12898979
    • 2010-10-06
    • Ping-Hung TsaiJyun-Siang HuangWen-Jer Tsai
    • Ping-Hung TsaiJyun-Siang HuangWen-Jer Tsai
    • G11C16/04G11C16/10G11C16/34
    • G11C16/0483G11C16/10G11C16/3427
    • A memory device includes a plurality of memory cells arranged in series in the semiconductor body, such as a NAND string, having a plurality of word lines. A selected memory cell is programmed by hot carrier injection. The program operation is based on metering a flow of carriers between a first semiconductor body region on a first side of the selected cell in the NAND string and a second semiconductor body region on a second side of the selected cell. A program potential higher than a hot carrier injection barrier level is applied to the selected cell, and then the drain to source voltage across the selected cell and the flow of carriers in the selected cell reach a level sufficient to support hot carrier injection, which is controlled by a switch cell adjacent the selected cell.
    • 存储器件包括串联布置在半导体本体中的多个存储单元,例如具有多个字线的NAND串。 选择的存储单元通过热载流子注入进行编程。 编程操作基于在NAND串中所选择的单元的第一侧上的第一半导体主体区域与所选择的单元的第二侧上的第二半导体本体区域之间计量载流子流。 将高于热载流子注入势垒级的程序电位施加到所选择的单元,然后跨越所选择的单元的漏极到源极电压,并且所选择的单元中的载流子流达到足以支持热载流子注入的水平, 由与所选择的单元相邻的开关单元控制。
    • 5. 发明授权
    • Method for erasing memory array
    • 擦除存储器阵列的方法
    • US08665652B2
    • 2014-03-04
    • US13168554
    • 2011-06-24
    • Jyun-Siang HuangWen-Jer TsaiPing-Hung Tsai
    • Jyun-Siang HuangWen-Jer TsaiPing-Hung Tsai
    • G11C11/34
    • G11C16/16
    • A method for erasing a memory array is provided. The memory array comprises a plurality of memory cell strings, and each of the memory cell strings comprises a plurality of memory cells connected to a plurality of word lines. The method for erasing the memory array includes the following steps. A first voltage is applied to a substrate of the memory array. A second voltage is applied to a word line of a selected memory cell, and a plurality of passing voltages are applied to other word lines. And, a third voltage and a fourth voltage are respectively applied to a first source/drain region and a second source/drain region of the selected memory cell, so that a band to band (BTB) hot hole injecting method is induced to erase the specific memory cell, wherein the third voltage is not equal to the fourth voltage.
    • 提供了一种擦除存储器阵列的方法。 存储器阵列包括多个存储单元串,并且每个存储单元串包括连接到多个字线的多个存储单元。 擦除存储器阵列的方法包括以下步骤。 将第一电压施加到存储器阵列的衬底。 第二电压被施加到所选存储单元的字线,并且多个通过电压被施加到其它字线。 并且,将第三电压和第四电压分别施加到所选择的存储单元的第一源极/漏极区域和第二源极/漏极区域,使得引入带对(BTB)热空穴注入方法来擦除 特定存储单元,其中第三电压不等于第四电压。
    • 6. 发明授权
    • Memory array and method for programming memory array
    • 用于编程存储器阵列的存储器阵列和方法
    • US08520439B2
    • 2013-08-27
    • US13346432
    • 2012-01-09
    • Wen-Jer TsaiPing-Hung TsaiJyun-Siang Huang
    • Wen-Jer TsaiPing-Hung TsaiJyun-Siang Huang
    • G11C16/12
    • G11C16/3468G11C16/24
    • A method for programming a memory array is provided. The memory array includes a memory cell string composed of a first transistor, a plurality of memory cells and a second transistor connected in series, and the method for programming the memory array includes following steps. In a setup phase, a switching memory cell in the memory cells is turned off, and a first voltage and a second voltage are applied to a first source/drain and a second source/drain of the switching memory cell. In a programming phase, a bit line connected to the memory cell string is floating, and a ramp signal is provided to a word line electrically connected to the switching memory cell.
    • 提供了一种用于编程存储器阵列的方法。 存储器阵列包括由第一晶体管,多个存储单元和串联连接的第二晶体管组成的存储单元串,并且存储器阵列的编程方法包括以下步骤。 在设置阶段,关闭存储单元中的开关存储单元,并将第一电压和第二电压施加到开关存储单元的第一源极/漏极和第二源极/漏极。 在编程阶段,连接到存储单元串的位线是浮置的,并且斜坡信号被提供给电连接到开关存储单元的字线。
    • 7. 发明申请
    • LOW VOLTAGE PROGRAMMING IN NAND FLASH WITH TWO STAGE SOURCE SIDE BIAS
    • 具有两级源极偏置的NAND闪存中的低电压编程
    • US20130088920A1
    • 2013-04-11
    • US13271161
    • 2011-10-11
    • JYUN-SIANG HUANGWen-Jer TsaiPing-Hung Tsai
    • JYUN-SIANG HUANGWen-Jer TsaiPing-Hung Tsai
    • G11C16/10G11C16/04
    • G11C16/10G11C16/04G11C16/0483G11C16/06G11C16/08G11C16/12
    • A memory device includes a plurality of memory cells arranged in series in the semiconductor body, such as a NAND string, having a plurality of word lines. A selected memory cell is programmed by hot carrier injection. The program operation is based on metering a flow of carriers between a first semiconductor body region on a first side of the selected cell in the NAND string and a second semiconductor body region on a second side of the selected cell. A program potential higher than a hot carrier injection barrier level is applied to the selected cell, and then the drain to source voltage across the selected cell and the flow of carriers in the selected cell reach a level sufficient to support hot carrier injection, which is controlled by a combination of a switch cell adjacent the selected cell and modulation of a source side voltage applied to the NAND string.
    • 存储器件包括串联布置在半导体本体中的多个存储单元,例如具有多个字线的NAND串。 选择的存储单元通过热载流子注入进行编程。 编程操作基于在NAND串中所选择的单元的第一侧上的第一半导体主体区域与所选择的单元的第二侧上的第二半导体本体区域之间计量载流子流。 将高于热载流子注入势垒级的程序电位施加到所选择的单元,然后跨越所选择的单元的漏极到源极电压,并且所选择的单元中的载流子流达到足以支持热载流子注入的水平, 由与所选择的单元相邻的开关单元的组合以及施加到NAND串的源极侧电压的调制来控制。
    • 8. 发明申请
    • METHOD FOR ERASING MEMORY ARRAY
    • 擦除存储器阵列的方法
    • US20120327721A1
    • 2012-12-27
    • US13168554
    • 2011-06-24
    • Jyun-Siang HuangWen-Jer TsaiPing-Hung Tsai
    • Jyun-Siang HuangWen-Jer TsaiPing-Hung Tsai
    • G11C16/16
    • G11C16/16
    • A method for erasing a memory array is provided. The memory array comprises a plurality of memory cell strings, and each of the memory cell strings comprises a plurality of memory cells connected to a plurality of word lines. The method for erasing the memory array includes the following steps. A first voltage is applied to a substrate of the memory array. A second voltage is applied to a word line of a selected memory cell, and a plurality of passing voltages are applied to other word lines. And, a third voltage and a fourth voltage are respectively applied to a first source/drain region and a second source/drain region of the selected memory cell, so that a band to band (BTB) hot hole injecting method is induced to erase the specific memory cell, wherein the third voltage is not equal to the fourth voltage.
    • 提供了一种擦除存储器阵列的方法。 存储器阵列包括多个存储单元串,并且每个存储单元串包括连接到多个字线的多个存储单元。 擦除存储器阵列的方法包括以下步骤。 将第一电压施加到存储器阵列的衬底。 第二电压被施加到所选存储单元的字线,并且多个通过电压被施加到其它字线。 并且,将第三电压和第四电压分别施加到所选择的存储单元的第一源极/漏极区域和第二源极/漏极区域,使得引入带对(BTB)热空穴注入方法来擦除 特定存储单元,其中第三电压不等于第四电压。