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1. 发明申请

US20110161719A1 PROCESSING DEVICES 有权
标题翻译：加工设备
公开(公告)号：US20110161719A1
公开(公告)日：2011-06-30
申请号：US12890110
申请日：2010-09-24
申请人： Chou-Kun LIN , Tay-Jyi LIN , Pi-Cheng HSIAO , Yuan-Hua CHU
发明人： Chou-Kun LIN , Tay-Jyi LIN , Pi-Cheng HSIAO , Yuan-Hua CHU
IPC分类号： G06F1/04
CPC分类号： G06F1/10
摘要： An embodiment of a processing device includes a function unit and a control unit. The function unit receives input data and performs a specific operation to the input data to generate result data. The control unit receives the result data and generates an output signal. The control unit latches the result data according to a first clock signal to generate first data and latches the result data according to a second clock signal to generate second data. The control unit compares the first data with the second data to generate a control signal and selects the first data or the second data to serve as data of the output signal according to the control signal. The second clock signal is delayed from the first clock signal by a predefined time period.
摘要翻译：处理装置的实施例包括功能单元和控制单元。功能单元接收输入数据并对输入数据执行特定操作以产生结果数据。控制单元接收结果数据并产生输出信号。控制单元根据第一时钟信号锁存结果数据，以产生第一数据，并根据第二时钟信号锁存结果数据，以产生第二数据。控制单元将第一数据与第二数据进行比较以产生控制信号，并根据控制信号选择第一数据或第二数据作为输出信号的数据。第二时钟信号从第一时钟信号延迟预定时间段。

2. 发明申请

US20110314306A1 PERFORMANCE SCALING DEVICE, PROCESSOR HAVING THE SAME, AND PERFORMANCE SCALING METHOD THEREOF 有权
标题翻译：性能调整装置，具有该功能的处理器及其性能调整方法
公开(公告)号：US20110314306A1
公开(公告)日：2011-12-22
申请号：US12881190
申请日：2010-09-14
申请人： Chi-Hung Lin , Pi-Cheng Hsiao , Tay-Jyi Lin , Gin-Kou Ma
发明人： Chi-Hung Lin , Pi-Cheng Hsiao , Tay-Jyi Lin , Gin-Kou Ma
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A performance scaling device, a processor having the same, and a performance scaling method thereof are provided. The performance scaling device includes an adaptive voltage scaling unit, a latency prediction unit, and a variable-latency datapath. The adaptive voltage scaling unit generates a plurality of operation voltages and transmits the operation voltages to the variable-latency datapath. The variable-latency datapath operates with different latencies according to the operation voltages and generates an operation latency. The latency prediction unit receives the operation latency and a system latency tolerance and generates a voltage scaling signal for the adaptive voltage scaling unit according to the operation latency and the system latency tolerance. The adaptive voltage scaling unit outputs and scales the operation voltages thereof according to the voltage scaling signal.
摘要翻译：提供了一种性能缩放装置，具有该性能缩放装置的处理器及其性能缩放方法。性能缩放装置包括自适应电压缩放单元，等待时间预测单元和可变延迟数据路径。自适应电压缩放单元产生多个操作电压并将操作电压发送到可变延迟数据路径。可变延迟数据路径根据操作电压运行不同的延迟，并产生运行延迟。延迟预测单元接收操作等待时间和系统等待时间容差，并且根据操作等待时间和系统等待时间容差产生用于自适应电压缩放单元的电压缩放信号。自适应电压调整单元根据电压缩放信号输出并缩放其工作电压。

3. 发明申请

US20110161690A1 VOLTAGE SCALING SYSTEMS 审中-公开
标题翻译：电压调节系统
公开(公告)号：US20110161690A1
公开(公告)日：2011-06-30
申请号：US12972026
申请日：2010-12-17
申请人： Tay-Jyi LIN , Pi-Cheng HSIAO
发明人： Tay-Jyi LIN , Pi-Cheng HSIAO
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , G06F1/3203
摘要： A voltage scaling system is provided and includes a processor, a latency predictor, a controller, and a voltage supplier. The processor performs functions and includes a function unit with variable-latency. The function unit is divided into several power domains. When the processor performs the functions, the function unit generates a latency signal according to a current circuit execution speed. The latency predictor predicts performance of the processor according to the received latency signal to generate a predication signal. The controller compares a value of the predication signal with at least one reference value. The controller generates control signals according to the comparison result. The voltage supplier couples to a first voltage source providing a high voltage and a second voltage source providing a low voltage. The voltage supplier is switched to provide the high or low voltage to the power domains according to the control signals, respectively.
摘要翻译：提供电压缩放系统并且包括处理器，等待时间预测器，控制器和电压供应器。处理器执行功能并且包括具有可变延迟的功能单元。功能单元分为几个电源域。当处理器执行功能时，功能单元根据当前电路执行速度生成等待时间信号。延迟预测器根据接收到的等待时间信号预测处理器的性能以产生预测信号。控制器将预测信号的值与至少一个参考值进行比较。控制器根据比较结果生成控制信号。电压供应器耦合到提供高电压的第一电压源和提供低电压的第二电压源。电压供应器根据控制信号分别切换到电力域的高电压或低电压。

4. 发明授权

US08589718B2 Performance scaling device, processor having the same, and performance scaling method thereof 有权
标题翻译：性能缩放设备，具有相同性能的处理器及其性能缩放方法
公开(公告)号：US08589718B2
公开(公告)日：2013-11-19
申请号：US12881190
申请日：2010-09-14
申请人： Chi-Hung Lin , Pi-Cheng Hsiao , Tay-Jyi Lin , Gin-Kou Ma
发明人： Chi-Hung Lin , Pi-Cheng Hsiao , Tay-Jyi Lin , Gin-Kou Ma
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A performance scaling device, a processor having the same, and a performance scaling method thereof are provided. The performance scaling device includes an adaptive voltage scaling unit, a latency prediction unit, and a variable-latency datapath. The adaptive voltage scaling unit generates a plurality of operation voltages and transmits the operation voltages to the variable-latency datapath. The variable-latency datapath operates with different latencies according to the operation voltages and generates an operation latency. The latency prediction unit receives the operation latency and a system latency tolerance and generates a voltage scaling signal for the adaptive voltage scaling unit according to the operation latency and the system latency tolerance. The adaptive voltage scaling unit outputs and scales the operation voltages thereof according to the voltage scaling signal.
摘要翻译：提供了一种性能缩放装置，具有该性能缩放装置的处理器及其性能缩放方法。性能缩放装置包括自适应电压缩放单元，等待时间预测单元和可变延迟数据路径。自适应电压缩放单元产生多个操作电压并将操作电压发送到可变延迟数据路径。可变延迟数据路径根据操作电压运行不同的延迟，并产生运行延迟。延迟预测单元接收操作等待时间和系统等待时间容差，并且根据操作等待时间和系统等待时间容差产生用于自适应电压缩放单元的电压缩放信号。自适应电压调整单元根据电压缩放信号输出并缩放其工作电压。

5. 发明授权

US08499188B2 Processing device for determining whether to output a first data using a first clock signal or a second data using delay from the first clock signal according to a control signal 有权
标题翻译：处理装置，用于根据控制信号确定是否使用第一时钟信号或第二数据使用延迟从第一时钟信号输出第一数据
公开(公告)号：US08499188B2
公开(公告)日：2013-07-30
申请号：US12890110
申请日：2010-09-24
申请人： Chou-Kun Lin , Tay-Jyi Lin , Pi-Cheng Hsiao , Yuan-Hua Chu
发明人： Chou-Kun Lin , Tay-Jyi Lin , Pi-Cheng Hsiao , Yuan-Hua Chu
IPC分类号： G06F1/04 , G06F1/00
CPC分类号： G06F1/10
摘要： An embodiment of a processing device includes a function unit and a control unit. The function unit receives input data and performs a specific operation to the input data to generate result data. The control unit receives the result data and generates an output signal. The control unit latches the result data according to a first clock signal to generate first data and latches the result data according to a second clock signal to generate second data. The control unit compares the first data with the second data to generate a control signal and selects the first data or the second data to serve as data of the output signal according to the control signal. The second clock signal is delayed from the first clock signal by a predefined time period.
摘要翻译：处理装置的实施例包括功能单元和控制单元。功能单元接收输入数据并对输入数据执行特定操作以产生结果数据。控制单元接收结果数据并产生输出信号。控制单元根据第一时钟信号锁存结果数据，以产生第一数据，并根据第二时钟信号锁存结果数据，以产生第二数据。控制单元将第一数据与第二数据进行比较以产生控制信号，并根据控制信号选择第一数据或第二数据作为输出信号的数据。第二时钟信号从第一时钟信号延迟预定时间段。

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