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1. 发明申请

US20050041480A1 METHOD FOR TRANSPARENT UPDATES OF OUTPUT DRIVER IMPEDANCE 失效
标题翻译：输出驱动器阻抗的透明更新方法
公开(公告)号：US20050041480A1
公开(公告)日：2005-02-24
申请号：US10604867
申请日：2003-08-22
申请人： Phillip Corson , Harold Pilo
发明人： Phillip Corson , Harold Pilo
IPC分类号： G11C5/00 , G11C7/00 , G11C7/10 , G11C7/22 , G11C11/419
CPC分类号： G11C7/1069 , G11C7/1051 , G11C7/22 , G11C7/222 , G11C11/419 , G11C2207/2254
摘要： Disclosed is a method and structure that controls an output driver by generating an output data path clock signal from a system clock signal and timing the programmable impedance of the output driver according to the output data path clock signal. The method/structure controls the timing of the line driver circuits according to the output data path clock signal. By timing the programmable impedance according to the output data path clock signal, the timing of delivery of an impedance control signal is coordinated with the timing of delivery of data. The method/structure also performs impedance updates on the output driver more frequently during initialization cycles than in cycles that occur after the initialization cycles expire using at least two differently timed clock dividers and a counter.
摘要翻译：公开了一种通过从系统时钟信号产生输出数据路径时钟信号并根据输出数据路径时钟信号对输出驱动器的可编程阻抗进行定时来控制输出驱动器的方法和结构。该方法/结构根据输出数据路径时钟信号来控制线路驱动电路的定时。通过根据输出数据路径时钟信号对可编程阻抗进行定时，将阻抗控制信号的传递时序与数据传送的时序协调。该方法/结构还在初始化周期期间更频繁地对输出驱动器进行阻抗更新，而不是在使用至少两个不同时间的时钟分频器和计数器的初始化周期到期后发生的周期。

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