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1. 发明授权

US07400510B1 Canister-based storage system 有权
标题翻译：基于罐的存储系统
公开(公告)号：US07400510B1
公开(公告)日：2008-07-15
申请号：US11022613
申请日：2004-12-27
申请人： Charles A. Milligan , Michael L. Leonhardt , Stephen S. Selkirk , Thai Nguyen , Steven H. McCown , Michael V. Konshak , Robert Klunker , Gerald O. Nions , Jacques Debiez , Ludovic Duval , Philippe Y. Le. Graverand
发明人： Charles A. Milligan , Michael L. Leonhardt , Stephen S. Selkirk , Thai Nguyen , Steven H. McCown , Michael V. Konshak , Robert Klunker , Gerald O. Nions , Jacques Debiez , Ludovic Duval , Philippe Y. Le. Graverand
IPC分类号： H05K5/00
CPC分类号： G11B33/128
摘要： The present invention provides a flexible storage system through the use of portable, removable canisters holding multiple storage subsystems.
摘要翻译：本发明通过使用容纳多个存储子系统的便携式可拆卸罐提供灵活的存储系统。

2. 发明授权

US06867614B1 Multiconfiguration module for hardware platforms 有权
标题翻译：用于硬件平台的多配置模块
公开(公告)号：US06867614B1
公开(公告)日：2005-03-15
申请号：US10445626
申请日：2003-05-27
申请人： Philippe Y. Le Graverand , Agnes C. Hermeline
发明人： Philippe Y. Le Graverand , Agnes C. Hermeline
IPC分类号： G06F7/38 , G06F17/50
CPC分类号： G06F17/5054
摘要： A multiconfiguration module (MCM) includes a field-programmable gate array (FPGA), a memory flash, and a complex programmable logic device (CPLD). Hardware interfaces between the concerned components and the use of a raw FPGA configuration data stream (representing a part of FPGA code which should be common to all streams) are discussed. The raw configuration data stream handles communications between a user application running on the host system and the hardware platform components. The user application has the capability to load a new configuration data stream into the memory flash and request a full or partial reconfiguration of the FPGA with the available configuration data stream. This results in an FPGA that is re-programmable on-demand and that is useable in a variety of hardware platforms such as, for example, RAIT.
摘要翻译：多组态模块（MCM）包括现场可编程门阵列（FPGA），存储器闪存和复杂可编程逻辑器件（CPLD）。讨论了相关组件之间的硬件接口以及使用原始FPGA配置数据流（代表所有流都应该是公共的FPGA代码的一部分）。原始配置数据流处理在主机系统上运行的用户应用和硬件平台组件之间的通信。用户应用程序能够将新的配置数据流加载到存储器闪存中，并使用可用的配置数据流请求FPGA的全部或部分重新配置。这导致可重新可编程按需FPGA的FPGA，并且可在各种硬件平台（例如RAIT）中使用。

3. 发明授权

US07143216B1 System for configuring expandable buses in a multi-device storage container and related method 有权
标题翻译：用于在多设备存储容器中配置可扩展总线的系统和相关方法
公开(公告)号：US07143216B1
公开(公告)日：2006-11-28
申请号：US11195415
申请日：2005-08-02
申请人： Charles A. Milligan , Philippe Y. Le Graverand
发明人： Charles A. Milligan , Philippe Y. Le Graverand
IPC分类号： G06F13/00 , G06F13/14 , H03K17/00 , H05K7/02 , G06F12/00
CPC分类号： G06F13/409 , G06F13/426
摘要： A system and method for configuring expandable buses wherein a host supports a plurality of expandable buses are provided. A plurality of devices are arranged to form a plurality of groups. Each group forms a chain of devices on an expandable bus. Each chain includes an input connector. The chains are configured such that connecting an expandable bus of the host to the input connector for a particular chain causes that particular chain to be directly connected to that particular expandable bus of the host. The absence of connecting any expandable bus of the host to the input connector for a particular chain causes that particular chain to be directly connected to a different chain so as to be indirectly connected to one of the expandable buses of the host. In another embodiment, the connections to an expandible bus of the host must be consistent with a predetermined connection logic.
摘要翻译：提供一种用于配置可扩展总线的系统和方法，其中主机支持多个可扩展总线。布置多个装置以形成多个组。每个组在可扩展总线上形成一组设备。每个链包括一个输入连接器。链被配置成使得将主机的可扩展总线连接到特定链的输入连接器使得该特定链直接连接到主机的特定可扩展总线。将主机的任何可扩展总线连接到用于特定链路的输入连接器的情况下，不使该特定链路直接连接到不同的链路，以便间接地连接到主机的一个可扩展总线。在另一个实施例中，到主机的可扩展总线的连接必须与预定的连接逻辑一致。

4. 发明授权

US07542298B1 Automated modular library and associated methods 有权
标题翻译：自动模块库及相关方法
公开(公告)号：US07542298B1
公开(公告)日：2009-06-02
申请号：US11094651
申请日：2005-03-30
申请人： Philippe Y. Le Graverand , Gerald O'Nions , Charles Milligan
发明人： Philippe Y. Le Graverand , Gerald O'Nions , Charles Milligan
IPC分类号： H05K5/00
CPC分类号： G11B15/6835 , G11B17/225
摘要： An automated modular storage library is formed by a plurality of available library elements. Each available library element is selected from a predetermined limited subset of library elements made available for library assembly. This creates a library that is modular by restricting the library elements used during assembly to the limited subset of library elements. According to a partial audit principle, an area where an intervention is to be performed may be physically separated prior to the intervention. After the intervention, the partial audit is conducted in a separated area where the intervention occurred, as the remainder of the library was protected during the intervention by the physical separation.
摘要翻译：由多个可用的库元素形成自动模块化存储库。每个可用的库元素从可用于库组装的库元素的预定限制子集中选择。这通过将组装过程中使用的库元素限制为库元素的有限子集来创建一个模块化的库。根据部分审核原则，干预之前的干预的区域可以在干预之前物理分离。在干预之后，部分审核在干预发生的分开区域进行，因为图书馆的剩余部分在干预期间被物理分离保护。

5. 发明授权

US07304855B1 Canister-based storage system 有权
标题翻译：基于罐的存储系统
公开(公告)号：US07304855B1
公开(公告)日：2007-12-04
申请号：US10791205
申请日：2004-03-02
申请人： Charles A. Milligan , Michael L. Leonhardt , Stephen S. Selkirk , Thai Nguyen , Steven H. McCown , Michael V. Konshak , Robert Klunker , Gerald O'Nions , Jacques Debiez , Ludovic Duval , Philippe Y. Le Graverand
发明人： Charles A. Milligan , Michael L. Leonhardt , Stephen S. Selkirk , Thai Nguyen , Steven H. McCown , Michael V. Konshak , Robert Klunker , Gerald O'Nions , Jacques Debiez , Ludovic Duval , Philippe Y. Le Graverand
IPC分类号： H05K5/00
CPC分类号： G11B33/128
摘要： The present invention provides a flexible storage system through the use of portable, removable canisters holding multiple storage subsystems.
摘要翻译：本发明通过使用容纳多个存储子系统的便携式可拆卸罐提供灵活的存储系统。

6. 发明授权

US07155634B1 Process for generating and reconstructing variable number of parity for byte streams independent of host block size 有权
标题翻译：用于生成和重建独立于主机块大小的字节流的可变数量奇偶校验的过程
公开(公告)号：US07155634B1
公开(公告)日：2006-12-26
申请号：US10280426
申请日：2002-10-25
申请人： Philippe Y. Le Graverand , Jacques Debiez , Gerald O'Nions , Charles A. Milligan , James P. Hughes , Christophe Carret
发明人： Philippe Y. Le Graverand , Jacques Debiez , Gerald O'Nions , Charles A. Milligan , James P. Hughes , Christophe Carret
IPC分类号： G06F11/00
CPC分类号： G06F11/1076 , G06F2211/1011 , G06F2211/1026 , G06F2211/103 , G06F2211/1092
摘要： A method, system and program for generating parity in a data storage system are provided. The invention comprises organizing an incoming data block into a specified number of data stripes and cascading the data stripes into a parity creation mechanism. The parity creation mechanism creates a specified number of parity stripes based on the data stripes, wherein the number of parity stripes is independent of the size of the data block. The parity creation mechanism can operate offline to reconstruct lost data stripes and parity stripes without using critical system resources, wherein the number of devices required for stripe reconstruction is less than the combined number of data stripes and parity stripes.
摘要翻译：提供了一种用于在数据存储系统中产生奇偶校验的方法，系统和程序。本发明包括将输入数据块组织成指定数量的数据条带，并将数据条带级联成奇偶校验生成机制。奇偶校验创建机制基于数据条带创建指定数量的奇偶校验条带，其中奇偶校验条带的数量与数据块的大小无关。奇偶校验创建机制可以离线操作以重建丢失的数据条带和奇偶校验条带，而不使用关键的系统资源，其中条带重建所需的设备数量小于数据条带和奇偶校验条带的组合数量。

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