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    • 1. 发明申请
    • VIDEO SIGNAL PROCESSING DEVICE
    • 视讯信号处理装置
    • US20120218385A1
    • 2012-08-30
    • US13400975
    • 2012-02-21
    • Nobutoshi FUJINAMINoriyuki IwakuraNatsumi Yano
    • Nobutoshi FUJINAMINoriyuki IwakuraNatsumi Yano
    • H04N13/00
    • H04N13/341
    • A video signal processing device includes a subfield conversion unit which converts a frame signal, which is a video signal corresponding to one frame of video, into a plurality of subfields corresponding to the frame signal, a drive parameter setting unit which sets a luminance weight and a light emitting position in the plurality of subfields for each of the plurality of subfields, a calculation unit which calculates a filtering-in amount of the frame signal corresponding to the plurality of subfields based on a signal level of the frame signal, the setup luminance weight, and the light emitting position, and a subtraction unit which subtracts the filtering-in amount from a signal level of a frame signal input to the subfield conversion unit subsequent to the frame signal.
    • 视频信号处理装置包括:子场转换单元,其将与一帧视频相对应的视频信号的帧信号转换为对应于帧信号的多个子场;驱动参数设置单元,其设置亮度权重;以及 针对多个子场中的每一个的多个子场中的发光位置,计算单元,其基于帧信号的信号电平来计算与多个子场相对应的帧信号的滤波量,设置亮度 重量和发光位置,以及减法单元,其从帧信号之后的输入到子场转换单元的帧信号的信号电平中减去滤波量。
    • 2. 发明授权
    • Dot clock reproducing method and dot clock reproducing apparatus using
the same
    • 点时钟再现方法和使用其的点时钟再现装置
    • US5940136A
    • 1999-08-17
    • US852189
    • 1997-05-06
    • Hideki AbeNoriyuki IwakuraTakahisa HatanoYoshikuni ShindoKazuhiro YamadaKazushige KidaKazunari Yamaguchi
    • Hideki AbeNoriyuki IwakuraTakahisa HatanoYoshikuni ShindoKazuhiro YamadaKazushige KidaKazunari Yamaguchi
    • G09G3/36G09G3/20G09G5/00G09G5/12H04N5/04
    • G09G5/008G09G3/3611
    • The invention presents a dot clock reproducing apparatus for automatically reproducing the dot clock easily, by setting the dot clock frequency of a video signal source, and correcting the phase difference of the dot clock occurring in the transmission route or the like, and also presents a dot clock reproducing method comprising, in dot clock reproduction, a step of sampling at a frequency different from the dot clock of video signal, a step of detecting the aliasing frequency component occurring at this time, and a step of reproducing the dot clock so as not to cause this aliasing frequency component, and as an apparatus employing such method, the invention further provides a dot clock reproducing apparatus comprising A/D converting means for receiving an adjusting signal delivered from a video signal source, and sampling this adjusting signal to convert into a digital signal, PLL means for dividing a specified synchronizing signal and generating a sampling clock for the A/D converting means, frequency analyzing means for analyzing the frequency of the adjusting signal from the output of the A/D converting means, and dividing ratio setting means for controlling the dividing ratio of the PLL means from the output of the frequency analyzing means, wherein the dot clock is reproduced so that the output of the PLL means may be used as the dot clock signal, thereby realizing a dot clock reproducing apparatus for reproducing automatically the dot clock easily, by setting the dot clock frequency of the video signal source, and correcting the phase difference of the dot clock occurring in the transmission route or the like.
    • 本发明提供了一种点时钟再现装置,用于通过设置视频信号源的点时钟频率和校正发送在发送路由等中的点时钟的相位差来自动轻松地再现点时钟,并且还呈现 点时钟再现方法包括点对点再现,以与视频信号的点时钟不同的频率进行采样的步骤,检测此时出现的混叠频率分量的步骤,以及再现点时钟的步骤,以便 不会引起该混叠频率成分,作为使用这种方法的装置,本发明还提供一种点时钟再现装置,包括A / D转换装置,用于接收从视频信号源传送的调整信号,并对该调整信号进行采样以转换 成为数字信号,PLL装置用于对指定的同步信号进行分频并产生用于A / D转换的采样时钟 ng装置,用于分析来自A / D转换装置的输出的调节信号的频率的频率分析装置和用于从频率分析装置的输出控制PLL装置的分频比的分频比设置装置,其中, 点时钟被再现,使得PLL装置的输出可以用作点时钟信号,从而实现点时钟再现装置,用于通过设置视频信号源的点时钟频率来自动地再现点时钟,并且校正 发送在发送路由等中的点时钟的相位差。
    • 3. 发明授权
    • Video signal processing apparatus and video signal processing method
    • 视频信号处理装置和视频信号处理方法
    • US08896674B2
    • 2014-11-25
    • US13418960
    • 2012-03-13
    • Natsumi YanoNoriyuki Iwakura
    • Natsumi YanoNoriyuki Iwakura
    • H04N13/04
    • H04N13/122
    • An image-luminance transformation section receives a video signal on a frame basis, and transforms the video signal into a luminance signal in each frame. A crosstalk ratio setting section sets a crosstalk ratio. An amount-of-correction calculation section calculates a correction luminance signal, for correcting a video signal of a frame n, using a luminance signal of a frame n−1, a luminance signal of the frame n, and the crosstalk ratio. A luminance-image transformation section transforms the correction luminance signal into a correction video signal. A correction section adds the correction video signal to the video signal of the frame n to generate a video signal of the frame n in which the amounts of crosstalk have been corrected.
    • 图像亮度变换部以帧为基础接收视频信号,并将视频信号变换成各帧的亮度信号。 串扰比设定部设定串扰比。 校正量计算部分使用帧n-1的亮度信号,帧n的亮度信号和串扰比来计算用于校正帧n的视频信号的校正亮度信号。 亮度图像变换部将校正亮度信号变换为校正视频信号。 校正部分将校正视频信号添加到帧n的视频信号,以产生其中纠正了串扰量的帧n的视频信号。
    • 4. 发明申请
    • LUMINANCE LEVEL CONTROL DEVICE
    • US20100321581A1
    • 2010-12-23
    • US12446039
    • 2007-11-26
    • Noriyuki IwakuraNobuo TaketaniTakeru YamashitaShozo TozakiTakashi OotomoHiroshi Yoshinari
    • Noriyuki IwakuraNobuo TaketaniTakeru YamashitaShozo TozakiTakashi OotomoHiroshi Yoshinari
    • H04N5/57
    • H04N5/147G09G3/288G09G2320/0242G09G2320/103G09G2330/021G09G2360/16
    • A scene change detecting circuit (1) detects a scene change of video. An average luminance level operating circuit (2) calculates an average luminance level (APL) of a video signal (VD). A luminance overdrive amount calculating circuit (3) calculates a luminance overdrive amount (OD) based on the average luminance level (APL). A time-linked attenuating circuit (7) outputs a power consumption limit correction amount (PA) by attenuating the luminance overdrive amount (OD) with an elapse of time from a point in time of detecting the scene change. An adder (8) adds the power consumption limit correction amount (PA) and a reference power consumption limit value (Lp) to output the addition result as a power consumption limit amount (PL). An ABL circuit (4) calculates a luminance limit amount (BL) based on luminance limit characteristics, the average luminance level (APL) and the power consumption limit amount (PL). A luminance level control circuit (5) determines a display drive condition (BC) based on the luminance limit amount (BL). A PDP drive controller (6) drives a display panel (20) based on the video signal (VD) and the display driving condition (BC).
    • 场景变化检测电路(1)检测视频的场景变化。 平均亮度电平操作电路(2)计算视频信号(VD)的平均亮度电平(APL)。 亮度过驱动量计算电路(3)基于平均亮度电平(APL)来计算亮度过驱动量(OD)。 时间链接的衰减电路(7)通过从检测到场景变化的时间点开始经过时间来衰减亮度过驱动量(OD)来输出功耗限制校正量(PA)。 加法器(8)将功耗限制修正量(PA)和参考功耗限制值(Lp)相加,作为功耗限制量(PL)输出相加结果。 ABL电路(4)基于亮度极限特性,平均亮度电平(APL)和功耗限制量(PL)来计算亮度限制量(BL)。 亮度级控制电路(5)基于亮度极限量(BL)确定显示驱动条件(BC)。 PDP驱动控制器(6)基于视频信号(VD)和显示驱动条件(BC)驱动显示面板(20)。
    • 6. 发明申请
    • VIDEO SIGNAL PROCESSING APPARATUS AND VIDEO SIGNAL PROCESSING METHOD
    • 视频信号处理设备和视频信号处理方法
    • US20130229498A1
    • 2013-09-05
    • US13418960
    • 2012-03-13
    • Natsumi YANONoriyuki IWAKURA
    • Natsumi YANONoriyuki IWAKURA
    • H04N13/04
    • H04N13/122
    • An image-luminance transformation section receives a video signal on a frame basis, and transforms the video signal into a luminance signal in each frame. A crosstalk ratio setting section sets a crosstalk ratio. An amount-of-correction calculation section calculates a correction luminance signal, for correcting a video signal of a frame n, using a luminance signal of a frame n−1, a luminance signal of the frame n, and the crosstalk ratio. A luminance-image transformation section transforms the correction luminance signal into a correction video signal. A correction section adds the correction video signal to the video signal of the frame n to generate a video signal of the frame n in which the amounts of crosstalk have been corrected.
    • 图像亮度变换部以帧为基础接收视频信号,并将视频信号变换成各帧的亮度信号。 串扰比设定部设定串扰比。 校正量计算部分使用帧n-1的亮度信号,帧n的亮度信号和串扰比来计算用于校正帧n的视频信号的校正亮度信号。 亮度图像变换部将校正亮度信号变换为校正视频信号。 校正部分将校正视频信号添加到帧n的视频信号,以产生其中纠正了串扰量的帧n的视频信号。
    • 7. 发明授权
    • Luminance level control device
    • 亮度级控制装置
    • US08130325B2
    • 2012-03-06
    • US12446039
    • 2007-11-26
    • Noriyuki IwakuraNobuo TaketaniTakeru YamashitaShozo TozakiTakashi OotomoHiroshi Yoshinari
    • Noriyuki IwakuraNobuo TaketaniTakeru YamashitaShozo TozakiTakashi OotomoHiroshi Yoshinari
    • H04N5/57H04N5/14
    • H04N5/147G09G3/288G09G2320/0242G09G2320/103G09G2330/021G09G2360/16
    • A scene change detecting circuit (1) detects a scene change of video. An average luminance level operating circuit (2) calculates an average luminance level (APL) of a video signal (VD). A luminance overdrive amount calculating circuit (3) calculates a luminance overdrive amount (OD) based on the average luminance level (APL). A time-linked attenuating circuit (7) outputs a power consumption limit correction amount (PA) by attenuating the luminance overdrive amount (OD) with an elapse of time from a point in time of detecting the scene change. An adder (8) adds the power consumption limit correction amount (PA) and a reference power consumption limit value (Lp) to output the addition result as a power consumption limit amount (PL). An ABL circuit (4) calculates a luminance limit amount (BL) based on luminance limit characteristics, the average luminance level (APL) and the power consumption limit amount (PL). A luminance level control circuit (5) determines a display drive condition (BC) based on the luminance limit amount (BL). A PDP drive controller (6) drives a display panel (20) based on the video signal (VD) and the display driving condition (BC).
    • 场景变化检测电路(1)检测视频的场景变化。 平均亮度电平操作电路(2)计算视频信号(VD)的平均亮度电平(APL)。 亮度过驱动量计算电路(3)基于平均亮度电平(APL)来计算亮度过驱动量(OD)。 时间链接的衰减电路(7)通过从检测到场景变化的时间点开始经过时间来衰减亮度过驱动量(OD)来输出功耗限制校正量(PA)。 加法器(8)将功耗限制修正量(PA)和参考功耗限制值(Lp)相加,作为功耗限制量(PL)输出相加结果。 ABL电路(4)基于亮度极限特性,平均亮度电平(APL)和功耗限制量(PL)来计算亮度限制量(BL)。 亮度级控制电路(5)基于亮度极限量(BL)确定显示驱动条件(BC)。 PDP驱动控制器(6)基于视频信号(VD)和显示驱动条件(BC)驱动显示面板(20)。