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1. 发明授权

US08487364B2 Nonvolatile semiconductor memory device and method for manufacturing same 有权
公开(公告)号：US08487364B2
公开(公告)日：2013-07-16
申请号：US12792378
申请日：2010-06-02
申请人： Takayuki Okamura , Noboru Ooike , Wataru Sakamoto , Takashi Izumida
发明人： Takayuki Okamura , Noboru Ooike , Wataru Sakamoto , Takashi Izumida
IPC分类号： H01L29/792 , H01L21/3205 , H01L21/4763
摘要： A nonvolatile semiconductor memory device according to embodiment includes: a semiconductor substrate having an upper portion being partitioned into a plurality of semiconductor portions extending in a first direction; a charge storage film provided on the semiconductor portion; a word-line electrode provided on the semiconductor substrate and extending in a second direction intersecting with the first direction; and a pair of selection gate electrodes provided on both sides of the word-line electrode in the first direction on the semiconductor substrate and extending in the second direction, a shortest distance between a corner portion of each of the semiconductor portions and each of the selection gate electrodes being longer than a shortest distance between the corner portion of the semiconductor portion and the word-line electrode in a cross section parallel to the second direction.

2. 发明授权

US08278717B2 Semiconductor memory device and method of manufacturing the same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08278717B2
公开(公告)日：2012-10-02
申请号：US12851112
申请日：2010-08-05
申请人： Noboru Ooike
发明人： Noboru Ooike
IPC分类号： H01L29/78 , H01L21/8239
CPC分类号： H01L27/11521 , H01L27/11526 , H01L27/11529
摘要： In one embodiment, a semiconductor memory device includes a semiconductor substrate, and isolation layers formed in a surface of the semiconductor substrate, and separating the semiconductor substrate into active areas, the isolation layers and the active areas being alternately arranged along a predetermined direction parallel to the surface of the semiconductor substrate, a height of upper surfaces of the isolation layers being lower than a height of an upper surface of the semiconductor substrate. The device further includes diffusion layers formed on surfaces of the active areas, and a stress liner formed on upper surfaces and side surfaces of the diffusion layers, and formed of a material having a lattice constant smaller than a lattice constant of a material formed of the semiconductor substrate.
摘要翻译：在一个实施例中，半导体存储器件包括半导体衬底和形成在半导体衬底的表面中的隔离层，并且将半导体衬底分离成有源区，隔离层和有源区沿着平行于半导体衬底的表面，隔离层的上表面的高度低于半导体衬底的上表面的高度。该装置还包括形成在有源区域的表面上的扩散层，以及形成在扩散层的上表面和侧表面上的应力衬垫，并且由具有小于由所述扩散层形成的材料的晶格常数的晶格常数的材料形成半导体衬底。

3. 发明申请

US20110049636A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20110049636A1
公开(公告)日：2011-03-03
申请号：US12851112
申请日：2010-08-05
申请人： Noboru OOIKE
发明人： Noboru OOIKE
IPC分类号： H01L27/088 , H01L29/06 , H01L21/28
CPC分类号： H01L27/11521 , H01L27/11526 , H01L27/11529
摘要： In one embodiment, a semiconductor memory device includes a semiconductor substrate, and isolation layers formed in a surface of the semiconductor substrate, and separating the semiconductor substrate into active areas, the isolation layers and the active areas being alternately arranged along a predetermined direction parallel to the surface of the semiconductor substrate, a height of upper surfaces of the isolation layers being lower than a height of an upper surface of the semiconductor substrate. The device further includes diffusion layers formed on surfaces of the active areas, and a stress liner formed on upper surfaces and side surfaces of the diffusion layers, and formed of a material having a lattice constant smaller than a lattice constant of a material formed of the semiconductor substrate.
摘要翻译：在一个实施例中，半导体存储器件包括半导体衬底和形成在半导体衬底的表面中的隔离层，并且将半导体衬底分离成有源区，隔离层和有源区沿着平行于半导体衬底的表面，隔离层的上表面的高度低于半导体衬底的上表面的高度。该装置还包括形成在有源区域的表面上的扩散层，以及形成在扩散层的上表面和侧表面上的应力衬垫，并且由具有小于由所述扩散层形成的材料的晶格常数的晶格常数的材料形成半导体衬底。

4. 发明授权

US08598649B2 Nonvolatile semiconductor memory device and method for manufacturing same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08598649B2
公开(公告)日：2013-12-03
申请号：US12792378
申请日：2010-06-02
申请人： Takayuki Okamura , Noboru Ooike , Wataru Sakamoto , Takashi Izumida
发明人： Takayuki Okamura , Noboru Ooike , Wataru Sakamoto , Takashi Izumida
IPC分类号： H01L29/792 , H01L21/3205 , H01L21/4763
CPC分类号： H01L27/11565 , H01L21/28282 , H01L27/11568
摘要： A nonvolatile semiconductor memory device according to embodiment includes: a semiconductor substrate having an upper portion being partitioned into a plurality of semiconductor portions extending in a first direction; a charge storage film provided on the semiconductor portion; a word-line electrode provided on the semiconductor substrate and extending in a second direction intersecting with the first direction; and a pair of selection gate electrodes provided on both sides of the word-line electrode in the first direction on the semiconductor substrate and extending in the second direction, a shortest distance between a corner portion of each of the semiconductor portions and each of the selection gate electrodes being longer than a shortest distance between the corner portion of the semiconductor portion and the word-line electrode in a cross section parallel to the second direction.
摘要翻译：根据实施例的非易失性半导体存储器件包括：半导体衬底，其具有被分隔成沿第一方向延伸的多个半导体部分的上部; 设置在半导体部分上的电荷存储膜; 字线电极，其设置在所述半导体基板上并沿与所述第一方向交叉的第二方向延伸; 以及一对选择栅电极，其设置在所述半导体基板上的所述字线电极的所述第一方向的两侧，并且沿所述第二方向延伸，所述半导体部分的每个的角部与所述选择中的每一个之间的最短距离栅电极比与半导体部分的角部和字线电极之间的平行于第二方向的截面中的最短距离更长。

5. 发明申请

US20110291174A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20110291174A1
公开(公告)日：2011-12-01
申请号：US12886160
申请日：2010-09-20
申请人： Noboru OOIKE , Tomomi Kusaka
发明人： Noboru OOIKE , Tomomi Kusaka
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/7881 , H01L21/26506 , H01L21/26513 , H01L21/2652 , H01L21/76224 , H01L27/11521 , H01L27/11524 , H01L29/105 , H01L29/1054 , H01L29/66825
摘要： In one embodiment, a nonvolatile semiconductor memory device includes a substrate, and a well region formed in the substrate. The device further includes device regions formed in the well region and defined by isolation trenches formed in the well region, the device regions extending in a first direction parallel to a principal surface of the substrate, and being adjacent to one another in a second direction that is perpendicular to the first direction. The device further includes isolation insulators buried in the isolation trenches to isolate the device regions from one another. The device further includes floating gates disposed on the device regions via gate insulators, and a control gate disposed on the floating gates via an intergate insulator. The device further includes first diffusion suppressing layers formed inside the respective device regions to divide each of the device regions into an upper device region and a lower device region. The device further includes second diffusion suppressing layers formed on side surfaces of the respective upper device regions, the side surfaces being perpendicular to the second direction.
摘要翻译：在一个实施例中，非易失性半导体存储器件包括衬底和形成在衬底中的阱区。该器件还包括形成在阱区中并由形成在阱区中的隔离沟槽限定的器件区，器件区沿平行于衬底的主表面的第一方向延伸，并在第二方向彼此相邻地延伸，垂直于第一方向。该器件还包括埋在隔离沟槽中的隔离绝缘体，以将器件区域彼此隔离。该器件还包括经由栅极绝缘体设置在器件区域上的浮动栅极和经由栅极绝缘体设置在浮置栅极上的控制栅极。该器件还包括形成在各个器件区域内部的第一扩散抑制层，以将每个器件区域分成上部器件区域和下部器件区域。该装置还包括形成在各个上部装置区域的侧表面上的第二扩散抑制层，该侧表面垂直于该第二方向。

6. 发明申请

US20100320527A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100320527A1
公开(公告)日：2010-12-23
申请号：US12792378
申请日：2010-06-02
申请人： Takayuki OKAMURA , Noboru OOIKE , Wataru SAKAMOTO , Takashi IZUMIDA
发明人： Takayuki OKAMURA , Noboru OOIKE , Wataru SAKAMOTO , Takashi IZUMIDA
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L27/11565 , H01L21/28282 , H01L27/11568
摘要： A nonvolatile semiconductor memory device according to embodiment includes: a semiconductor substrate having an upper portion being partitioned into a plurality of semiconductor portions extending in a first direction; a charge storage film provided on the semiconductor portion; a word-line electrode provided on the semiconductor substrate and extending in a second direction intersecting with the first direction; and a pair of selection gate electrodes provided on both sides of the word-line electrode in the first direction on the semiconductor substrate and extending in the second direction, a shortest distance between a corner portion of each of the semiconductor portions and each of the selection gate electrodes being longer than a shortest distance between the corner portion of the semiconductor portion and the word-line electrode in a cross section parallel to the second direction.
摘要翻译：根据实施例的非易失性半导体存储器件包括：半导体衬底，其具有被分隔成沿第一方向延伸的多个半导体部分的上部; 设置在半导体部分上的电荷存储膜; 字线电极，其设置在所述半导体基板上并沿与所述第一方向交叉的第二方向延伸; 以及一对选择栅电极，其设置在所述半导体基板上的所述字线电极的所述第一方向的两侧，并且沿所述第二方向延伸，所述半导体部分的每个的角部与所述选择中的每一个之间的最短距离栅电极比与半导体部分的角部和字线电极之间的平行于第二方向的截面中的最短距离更长。

7. 发明授权

US08421142B2 Nonvolatile semiconductor memory device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08421142B2
公开(公告)日：2013-04-16
申请号：US12886160
申请日：2010-09-20
申请人： Noboru Ooike , Tomomi Kusaka
发明人： Noboru Ooike , Tomomi Kusaka
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/7881 , H01L21/26506 , H01L21/26513 , H01L21/2652 , H01L21/76224 , H01L27/11521 , H01L27/11524 , H01L29/105 , H01L29/1054 , H01L29/66825
摘要： In one embodiment, a nonvolatile semiconductor memory device includes a substrate, and a well region formed in the substrate. The device further includes device regions formed in the well region and defined by isolation trenches formed in the well region, the device regions extending in a first direction parallel to a principal surface of the substrate, and being adjacent to one another in a second direction that is perpendicular to the first direction. The device further includes isolation insulators buried in the isolation trenches to isolate the device regions from one another. The device further includes floating gates disposed on the device regions via gate insulators, and a control gate disposed on the floating gates via an intergate insulator. The device further includes first diffusion suppressing layers formed inside the respective device regions to divide each of the device regions into an upper device region and a lower device region. The device further includes second diffusion suppressing layers formed on side surfaces of the respective upper device regions, the side surfaces being perpendicular to the second direction.
摘要翻译：在一个实施例中，非易失性半导体存储器件包括衬底和形成在衬底中的阱区。该器件还包括形成在阱区中并由形成在阱区中的隔离沟槽限定的器件区，器件区沿平行于衬底的主表面的第一方向延伸，并在第二方向彼此相邻地延伸，垂直于第一方向。该器件还包括埋在隔离沟槽中的隔离绝缘体，以将器件区域彼此隔离。该器件还包括经由栅极绝缘体设置在器件区域上的浮动栅极和经由栅极绝缘体设置在浮置栅极上的控制栅极。该器件还包括形成在各个器件区域内部的第一扩散抑制层，以将每个器件区域分成上部器件区域和下部器件区域。该装置还包括形成在各个上部装置区域的侧表面上的第二扩散抑制层，该侧表面垂直于该第二方向。

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