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1. 发明授权

US07319852B2 Apparatus and method for DC offset compensation in a direct conversion receiver 有权
标题翻译：直接转换接收机中DC偏移补偿的装置和方法
公开(公告)号：US07319852B2
公开(公告)日：2008-01-15
申请号：US10233364
申请日：2002-08-29
申请人： Nikolai Schlegel , Christian Holenstein , Daniel Filipovic , Nitin Kasturi
发明人： Nikolai Schlegel , Christian Holenstein , Daniel Filipovic , Nitin Kasturi
IPC分类号： H04B1/26
CPC分类号： H04L25/063 , H03D3/008 , H04B1/30
摘要： An apparatus for coarse compensation of a direct current (DC) offset in a direct to baseband receiver architecture utilizes a serial analog to digital converter (ADC), such as a Delta-Sigma converter, to convert the received signal to digital form. The output of the ADC is sampled for a predetermined number of samples and a counter coupled to the ADC is incremented each time the sample generated by the ADC is a logic one. The counter is not incremented if the sample from the ADC is a logic zero. After the predetermined number of samples is obtained, the counter value is indicative of the DC offset in the received signal. The counter value may be converted by a code converter to a correction value for easy operation of a digital to analog converter (DAC). If the number of samples from the ADC is a power of two, the code converted may be readily implemented by simply inverting the most significant bit (MSB) from the counter to thereby generate a twos complement version of the counter value. The correction value is coupled to the DAC to generate a compensation signal, which is provided to the received signal path in the form of a feedback signal to compensate for the DC offset.
摘要翻译：用于直接到基带接收机架构中的直流（DC）偏移的粗略补偿的装置利用诸如Δ-Σ转换器的串行模数转换器（ADC）将接收的信号转换成数字形式。对于预定数量的采样，ADC的输出被采样，并且每当由ADC产生的采样为逻辑1时，耦合到ADC的计数器递增。如果来自ADC的采样为逻辑0，则计数器不递增。在获得预定数量的样本之后，计数器值表示接收信号中的直流偏移。计数器值可以由代码转换器转换成用于容易操作数模转换器（DAC）的校正值。如果来自ADC的采样数是2的幂，则通过简单地将来自计数器的最高有效位（MSB）反相，从而生成计数器值的二进制补码版本，可以容易地实现转换代码。校正值耦合到DAC以产生补偿信号，其以反馈信号的形式提供给接收信号路径以补偿DC偏移。

2. 发明授权

US07940832B2 Method and apparatus for efficient Walsh covering and summing of signals in a communication system 有权
标题翻译：用于在通信系统中有效Walsh覆盖和求和信号的方法和装置
公开(公告)号：US07940832B2
公开(公告)日：2011-05-10
申请号：US10959516
申请日：2004-10-05
申请人： Nikolai Schlegel , James Y. Hurt
发明人： Nikolai Schlegel , James Y. Hurt
IPC分类号： H04B1/00
CPC分类号： H04J13/0048 , H03M13/2703
摘要： A method and apparatus is provided for efficient processing of signal in a communication system. The processing of the signal for transmission may include encoding a block of data at an encoding rate 1/R. The encoding produces R number of data symbols for every data bit in the block of data. A block of RAM (299, 600) is partitioned into a plurality of blocks of RAM to allow reading simultaneously data symbols from the plurality of blocks of RAM to produce an in-phase and a quad-phase data symbols simultaneously. At least two scramblers (306 and 307) are used for simultaneously scrambling the in-phase and quad-phase data symbols. A Walsh covering/summing block (700) followed by the scramblers provides efficient Walsh covering and summing of signals for a combined transmission from the communication system.
摘要翻译：提供一种用于在通信系统中有效处理信号的方法和装置。用于发送的信号的处理可以包括以编码率1 / R编码数据块。编码为数据块中的每个数据位产生R个数据符号。一块RAM（299,600）被划分成多个RAM块，以允许同时从多个RAM块读取数据符号以同时产生同相和四相数据符号。至少两个加扰器（306和307）用于同时加扰同相和四相数据符号。沃尔什覆盖/求和块（700）紧随其后的加扰器提供了有效的沃尔什覆盖和信号来自通信系统的组合传输的信号。

3. 发明授权

US06975584B1 Communication system method and apparatus 失效
标题翻译：通信系统方法及装置
公开(公告)号：US06975584B1
公开(公告)日：2005-12-13
申请号：US09676345
申请日：2000-09-29
申请人： Nikolai Schlegel , James Y. Hurt
发明人： Nikolai Schlegel , James Y. Hurt
IPC分类号： H03M13/27 , H04B1/69 , H04L1/00 , H04J11/00
CPC分类号： H04L1/0071 , H03M13/2703 , H04L1/0041
摘要： A method and apparatus is provided for efficient processing of signal in a communication system. The processing of the signal for transmission may include encoding a block of data at an encoding rate 1/R. The encoding produces R number of data symbols for every data bit in the block of data. A block of RAM (299, 600) is partitioned into a plurality of blocks of RAM to allow reading simultaneously data symbols from the plurality of blocks of RAM to produce an in-phase and a quad-phase data symbols simultaneously. At least two scramblers (306 and 307) are used for simultaneously scrambling the in-phase and quad-phase data symbols. A Walsh covering/summing block (700) followed by the scramblers provides efficient Walsh covering and summing of signals for a combined transmission from the communication system.
摘要翻译：提供一种用于在通信系统中有效处理信号的方法和装置。用于发送的信号的处理可以包括以编码率1 / R编码数据块。编码为数据块中的每个数据位产生R个数据符号。一块RAM（299,600）被划分成多个RAM块，以允许同时从多个RAM块读取数据符号以同时产生同相和四相数据符号。至少两个加扰器（306和307）用于同时加扰同相和四相数据符号。沃尔什覆盖/求和块（700）紧随其后的加扰器提供了有效的沃尔什覆盖和信号来自通信系统的组合传输的信号。

4. 发明申请

US20050201448A1 Method and apparatus for efficient Walsh covering and summing of signals in a communication system 有权
标题翻译：用于在通信系统中有效Walsh覆盖和求和信号的方法和装置
公开(公告)号：US20050201448A1
公开(公告)日：2005-09-15
申请号：US10959516
申请日：2004-10-05
申请人： Nikolai Schlegel , James Hurt
发明人： Nikolai Schlegel , James Hurt
IPC分类号： H03M13/27 , H04J11/00 , H04J13/00 , H04B1/707
CPC分类号： H04J13/0048 , H03M13/2703
摘要： A method and apparatus is provided for efficient processing of signal in a communication system. The processing of the signal for transmission may include encoding a block of data at an encoding rate 1/R. The encoding produces R number of data symbols for every data bit in the block of data. A block of RAM (299, 600) is partitioned into a plurality of blocks of RAM to allow reading simultaneously data symbols from the plurality of blocks of RAM to produce an in-phase and a quad-phase data symbols simultaneously. At least two scramblers (306 and 307) are used for simultaneously scrambling the in-phase and quad-phase data symbols. A Walsh covering/summing block (700) followed by the scramblers provides efficient Walsh covering and summing of signals for a combined transmission from the communication system.
摘要翻译：提供一种用于在通信系统中有效处理信号的方法和装置。用于发送的信号的处理可以包括以编码率1 / R编码数据块。编码为数据块中的每个数据位产生R个数据符号。一块RAM（299,600）被划分成多个RAM块，以允许同时从多个RAM块读取数据符号以同时产生同相和四相数据符号。至少两个加扰器（306和307）用于同时加扰同相和四相数据符号。沃尔什覆盖/求和块（700）紧随其后的加扰器提供了有效的沃尔什覆盖和信号来自通信系统的组合传输的信号。

5. 发明授权

US06847677B1 Method and apparatus for efficient Walsh covering and summing of signals in a communication system 有权
标题翻译：用于在通信系统中有效Walsh覆盖和求和信号的方法和装置
公开(公告)号：US06847677B1
公开(公告)日：2005-01-25
申请号：US09676346
申请日：2000-09-29
申请人： Nikolai Schlegel , James Y. Hurt
发明人： Nikolai Schlegel , James Y. Hurt
IPC分类号： H03M13/27 , H04J11/00 , H04J13/00 , H04B1/707
CPC分类号： H04J13/0048 , H03M13/2703
摘要： A method and apparatus is provided for efficient processing of signal in a communication system. The processing of the signal for transmission may include encoding a block of data at an encoding rate 1/R. The encoding produces R number of data symbols for every data bit in the block of data. A block of RAM is partitioned into a plurality of blocks of RAM to allow reading simultaneously data symbols from the plurality of blocks of RAM to produce an in-phase and a quad-phase data symbols simultaneously. At least two scramblers are used for simultaneously scrambling the in-phase and quad-phase data symbols. A Walsh covering/summing block followed by the scramblers provides efficient Walsh covering and summing of signals for a combined transmission from the communication system.
摘要翻译：提供一种用于在通信系统中有效处理信号的方法和装置。用于发送的信号的处理可以包括以编码率1 / R编码数据块。编码为数据块中的每个数据位产生R个数据符号。一块RAM被划分成多个RAM块，以允许同时从多个RAM块中读取数据符号以同时产生同相和四相数据符号。至少使用两个扰频器来同时加扰同相和四相数据符号。沃尔什覆盖/求和块随后是扰频器，为来自通信系统的组合传输提供了有效的沃尔什覆盖和求和信号。

6. 发明授权

US06763492B1 Method and apparatus for encoding of linear block codes 失效
标题翻译：用于线性块码编码的方法和装置
公开(公告)号：US06763492B1
公开(公告)日：2004-07-13
申请号：US09671372
申请日：2000-09-26
申请人： James Y. Hurt , Jeffrey A. Levin , Nikolai Schlegel
发明人： James Y. Hurt , Jeffrey A. Levin , Nikolai Schlegel
IPC分类号： H03M1300
CPC分类号： H04L1/0057 , H03M13/096 , H03M13/15 , H03M13/47 , H04L1/0041
摘要： A method and apparatus for efficient encoding of linear block codes uses a lookup table including a set of impulse responses to support faster performance by encoding in parallel. Advantages include a scalability that is lacking in existing schemes.
摘要翻译：用于线性块码的有效编码的方法和装置使用包括一组脉冲响应的查找表，以通过并行编码来支持更快的性能。优点包括现有方案中缺乏可扩展性。

7. 发明授权

US06714599B1 Method and apparatus for efficient processing of signal in a communication system 有权
标题翻译：用于在通信系统中有效处理信号的方法和装置
公开(公告)号：US06714599B1
公开(公告)日：2004-03-30
申请号：US09675517
申请日：2000-09-29
申请人： Nikolai Schlegel , James Y. Hurt
发明人： Nikolai Schlegel , James Y. Hurt
IPC分类号： H03C300
CPC分类号： H04L1/0071 , H03M13/2703 , H04B1/707 , H04L1/0043
摘要： A method and apparatus is provided for efficient processing of signal in a communication system. The processing of the signal for transmission may include encoding a block of data at an encoding rate 1/R. The encoding produces R number of data symbols for every data bit in the block of data. A block of RAM (299, 600) is partitioned into a plurality of blocks of RAM to allow reading simultaneously data symbols from the plurality of blocks of RAM to produce an in-phase and a quad-phase data symbols simultaneously. At least two scramblers (306 and 307) are used for simultaneously scrambling the in-phase and quad-phase data symbols. A Walsh covering/summing block 700 provides efficient Walsh covering and summing of signals for a combined transmission from the communication system.
摘要翻译：提供一种用于在通信系统中有效处理信号的方法和装置。用于发送的信号的处理可以包括以编码率1 / R编码数据块。编码为数据块中的每个数据位产生R个数据符号。一块RAM（299,600）被划分成多个RAM块，以允许同时从多个RAM块读取数据符号以同时产生同相和四相数据符号。至少两个加扰器（306和307）用于同时加扰同相和四相数据符号。沃尔什覆盖/求和块700提供了用于来自通信系统的组合传输的信号的有效的沃尔什覆盖和求和。

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