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    • 5. 发明授权
    • Intelligent integrated diagnostics
    • 智能综合诊断
    • US07860682B2
    • 2010-12-28
    • US10577676
    • 2004-10-29
    • Kelvin HamiltonKeith BrownNick TaylorDavid Lane
    • Kelvin HamiltonKeith BrownNick TaylorDavid Lane
    • G06F17/00
    • G05B23/0251Y10S706/912
    • A diagnostics system comprising a topological map of a target system that has nodes (38, 40, 42, 44, 46, 48) that correspond to components (29, 30, 32, 34, 36) of the target system and links that correspond to connections between the components. Associated with the topological map is a knowledge store (50) that has a structure that reflects or corresponds to that of the topological map. Included in this store (50) is a plurality of sections or libraries each of which is provided for storing design specific data associated with one of the nodes (38, 40, 42, 44, 46, 48) of the topological map. Data received from one or more sensors on the target system is included in the topological map, and used together with the design specific information in the knowledge store to diagnose faults.
    • 一种诊断系统,包括目标系统的拓扑图,所述目标系统具有与所述目标系统的组件(29,30,32,34,36)相对应的节点(38,40,42,44,46,48)和对应于所述目标系统的组件 到组件之间的连接。 与拓扑图相关联的是具有反映或对应于拓扑图的结构的知识库(50)。 包括在该商店(50)中的多个部分或库被提供用于存储与拓扑图的一个节点(38,40,42,44,46,48)相关联的设计专用数据。 从目标系统上的一个或多个传感器接收的数据包含在拓扑图中,并与知识库中的设计特定信息一起用于诊断故障。
    • 9. 发明授权
    • Ultra high throughput wafer vacuum processing system
    • 超高产量晶圆真空处理系统
    • US5855681A
    • 1999-01-05
    • US751485
    • 1996-11-18
    • Dan MaydanSasson SomekhAshok SinhaKevin FairbairnChristopher LaneKelly ColborneHari K. PonnekantiW. N.(Nick) Taylor
    • Dan MaydanSasson SomekhAshok SinhaKevin FairbairnChristopher LaneKelly ColborneHari K. PonnekantiW. N.(Nick) Taylor
    • H01L21/00H01L21/205H01L21/677H01L21/687C23C16/00C23F1/02
    • H01L21/67167H01L21/6719H01L21/67196H01L21/67201H01L21/67742H01L21/68707H01L21/68785
    • The present invention generally provides a cassette-to-cassette vacuum processing system which concurrently processes multiple wafers and combines the advantages of single wafer process chambers and multiple wafer handling for high quality wafer processing, high wafer throughput and reduced footprint. In accordance with one aspect of the invention, the system is preferably a staged vacuum system which generally includes a loadlock chamber for introducing wafers into the system and which also provides wafer cooling following processing, a transfer chamber for housing a wafer handler, and one or more processing chambers each having two or more processing regions which are isolatable from each other and preferably share a common gas supply and a common exhaust pump. The processing regions also preferably include separate gas distribution assemblies and RF power sources to provide a uniform plasma density over a wafer surface in each processing region. The processing chambers are configured to allow multiple, isolated processes to be performed concurrently in at least two processing regions so that at least two wafers can be processed simultaneously in a chamber with a high degree of process control provided by shared gas sources, shared exhaust systems, separate gas distribution assemblies, separate RF power sources, and separate temperature control systems.
    • 本发明通常提供一种盒式到盒式真空处理系统,其同时处理多个晶片,并且结合了单晶片处理室和多个晶片处理的优点,用于高质量晶片处理,高晶圆吞吐量和减小的占地面积。 根据本发明的一个方面,该系统优选地是分级真空系统,其通常包括用于将晶片引入系统中并且还提供后续处理的晶片冷却的负载锁定室,用于容纳晶片处理器的传送室,以及一个或 更多的处理室具有可彼此隔离的两个或更多个处理区域,并且优选地共享公共气体供应源和公共排气泵。 处理区域还优选地包括单独的气体分配组件和RF功率源,以在每个处理区域中在晶片表面上提供均匀的等离子体密度。 处理室被配置为允许在至少两个处理区域中同时执行多个隔离过程,使得可以在室内同时处理至少两个晶片,具有由共用气源提供的高程度的过程控制,共用排气系统 ,独立的气体分配组件,独立的射频电源和独立的温度控制系统。