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1. 发明授权

US08502712B2 Analogue to digital converter and signal processing system 失效
标题翻译：模数转换器和信号处理系统
公开(公告)号：US08502712B2
公开(公告)日：2013-08-06
申请号：US13425317
申请日：2012-03-20
申请人： Naoya Waki , Junya Matsuno , Takafumi Yamaji , Masanori Furuta
发明人： Naoya Waki , Junya Matsuno , Takafumi Yamaji , Masanori Furuta
IPC分类号： H03M1/06
CPC分类号： H03M1/0626 , H03M1/0836 , H03M1/1215
摘要： According to one embodiment, an analogue to digital converter converts an analogue input signal to a digital output signal. The converter includes an analogue to digital converting unit, a multiplexer, a pseudo-alias signal generator, a gain controller, and an alias signal compensator. The analogue to digital converting unit converts the analogue input signal to a plurality of digital signals. The multiplexer sequentially selects one of the digital signals and outputs the selected digital signal as a multiplexer output. The pseudo-alias signal generator generates a plurality of pseudo-alias signals from the digital signals. The pseudo-alias signal simulates an alias signal component in the multiplexer output. The gain controller generates a plurality of gain control signals by using the pseudo-alias signals. The gain control signal controls gain of the digital output signal. The alias signal compensator compensates the alias signal component by using the gain control signals.
摘要翻译：根据一个实施例，模数转换器将模拟输入信号转换成数字输出信号。转换器包括模数转换单元，多路复用器，伪别名信号发生器，增益控制器和别名信号补偿器。模数转换单元将模拟输入信号转换为多个数字信号。多路复用器顺序地选择一个数字信号并输出所选择的数字信号作为多路复用器输出。伪别名信号发生器从数字信号产生多个伪别名信号。伪别名信号模拟复用器输出中的别名信号分量。增益控制器通过使用伪别名信号来产生多个增益控制信号。增益控制信号控制数字输出信号的增益。别名信号补偿器通过使用增益控制信号来补偿别名信号分量。

2. 发明授权

US08004435B2 Discrete-time circuit 失效
标题翻译：离散时间电路
公开(公告)号：US08004435B2
公开(公告)日：2011-08-23
申请号：US12612821
申请日：2009-11-05
申请人： Naoya Waki , Hirotomo Ishii
发明人： Naoya Waki , Hirotomo Ishii
IPC分类号： H03M1/00
CPC分类号： H03M1/0658 , H03M1/0695 , H03M1/1245 , H03M1/44 , H03M3/326 , H03M3/35 , H03M3/43 , H03M3/454
摘要： To reduce a random noise power included in an analog input signal, a discrete-time circuit samples an inputted analog signal a plurality of number of times at different times respectively and performs averaging processing on sampling results, thus enabling to respond appropriately even if an input signal has a high frequency without increasing a size of the circuit.
摘要翻译：为了减少包含在模拟输入信号中的随机噪声功率，离散时间电路分别在不同时间对输入的模拟信号多次采样，并对采样结果进行平均处理，因此即使输入信号具有高频率而不增加电路的尺寸。

3. 发明申请

US20130076544A1 ANALOGUE TO DIGITAL CONVERTER AND SIGNAL PROCESSING SYSTEM 失效
标题翻译：数字转换器和信号处理系统的模拟
公开(公告)号：US20130076544A1
公开(公告)日：2013-03-28
申请号：US13425317
申请日：2012-03-20
申请人： Naoya Waki , Junya Matsuno , Takafumi Yamaji , Masanori Furuta
发明人： Naoya Waki , Junya Matsuno , Takafumi Yamaji , Masanori Furuta
IPC分类号： H03M1/06
CPC分类号： H03M1/0626 , H03M1/0836 , H03M1/1215
摘要： According to one embodiment, an analogue to digital converter converts an analogue input signal to a digital output signal. The converter includes an analogue to digital converting unit, a multiplexer, a pseudo-alias signal generator, a gain controller, and an alias signal compensator. The analogue to digital converting unit converts the analogue input signal to a plurality of digital signals. The multiplexer sequentially selects one of the digital signals and outputs the selected digital signal as a multiplexer output. The pseudo-alias signal generator generates a plurality of pseudo-alias signals from the digital signals. The pseudo-alias signal simulates an alias signal component in the multiplexer output. The gain controller generates a plurality of gain control signals by using the pseudo-alias signals. The gain control signal controls gain of the digital output signal. The alias signal compensator compensates the alias signal component by using the gain control signals.
摘要翻译：根据一个实施例，模数转换器将模拟输入信号转换成数字输出信号。转换器包括模数转换单元，多路复用器，伪别名信号发生器，增益控制器和别名信号补偿器。模数转换单元将模拟输入信号转换为多个数字信号。多路复用器顺序地选择一个数字信号并输出所选择的数字信号作为多路复用器输出。伪别名信号发生器从数字信号产生多个伪别名信号。伪别名信号模拟复用器输出中的别名信号分量。增益控制器通过使用伪别名信号来产生多个增益控制信号。增益控制信号控制数字输出信号的增益。别名信号补偿器通过使用增益控制信号来补偿别名信号分量。

4. 发明申请

US20100207795A1 DISCRETE-TIME CIRCUIT 失效
标题翻译：分离电路
公开(公告)号：US20100207795A1
公开(公告)日：2010-08-19
申请号：US12612821
申请日：2009-11-05
申请人： Naoya Waki , Hirotomo Ishii
发明人： Naoya Waki , Hirotomo Ishii
IPC分类号： H03M3/00 , G06G7/12
CPC分类号： H03M1/0658 , H03M1/0695 , H03M1/1245 , H03M1/44 , H03M3/326 , H03M3/35 , H03M3/43 , H03M3/454
摘要： To reduce a random noise power included in an analog input signal, a discrete-time circuit samples an inputted analog signal a plurality of number of times at different times respectively and performs averaging processing on sampling results, thus enabling to respond appropriately even if an input signal has a high frequency without increasing a size of the circuit.
摘要翻译：为了减少包含在模拟输入信号中的随机噪声功率，离散时间电路分别在不同时间对输入的模拟信号多次采样，并对采样结果进行平均处理，因此即使输入信号具有高频率而不增加电路的尺寸。

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