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1. 发明申请

US20090274814A1 Production method of meat substitute food substance 审中-公开
标题翻译：肉类替代食品的生产方法
公开(公告)号：US20090274814A1
公开(公告)日：2009-11-05
申请号：US12219033
申请日：2008-07-15
申请人： Miyuki Ishida
发明人： Miyuki Ishida
IPC分类号： A23L1/0522
CPC分类号： A23J3/227 , A23L29/244
摘要： Meat substitute food substance produced by melting the frozen konnyaku, pressing or compressing the molten konnyaku so as to dehydrate them and to obtain konnyaku chips containing a little volume of water, adding one or plural kinds of bonding materials to the konnyaku chips obtaining a mixture, crushing or cutting the chips and stirring them, adding one or plural kinds of non-water-soluble food of protein kind to the mixture and mixing the mixture in a mixing machine.
摘要翻译：通过熔化冷冻konnyaku生产的肉类替代食物，压制或压缩熔融的konnyaku以使其脱水并获得含有少量水的konnyaku碎片，向获得混合物的konnyaku芯片添加一种或多种粘合材料，粉碎或切碎碎片并搅拌，将一种或多种蛋白质类型的非水溶性食品加入到混合物中，并将混合物混合在混合机中。

2. 发明授权

US5170473A Communication command control system between CPUs 失效
标题翻译： CPU之间的通信命令控制系统
公开(公告)号：US5170473A
公开(公告)日：1992-12-08
申请号：US439329
申请日：1989-11-21
申请人： Miyuki Ishida
发明人： Miyuki Ishida
IPC分类号： G06F12/00 , G06F15/17
CPC分类号： G06F15/17
摘要： A communication command control system among a plurality of CPUs includes a control apparatus for transmitting an acknowledge signal to a request signal and thereafter for transmitting receiving command data and status data. The control apparatus comprises a local system priority determining circuit for determining a priority of signal processor commands from a plurality of CPUs and a local/remote system priority determining circuit for determining the priority between a local SIGP command controller and a remote SIGP controller. The data transfer period of the response request is detected when a response request is transmitted from another CPU of SIGP command control apparatus to the local and local/remote priority determining circuits, by counting the transfer period of command data after the response request is received and the acknowledge signal is transmitted and by counting the transfer period of the status data received from the other CPU. The system judges the destination of a CPU-ID representing the destination of said acknowledge signal, command data and status data.

3. 发明授权

US4853929A Electronic circuit device able to diagnose status-holding circuits by scanning 失效
标题翻译：电子电路设备能够通过扫描诊断状态保持电路
公开(公告)号：US4853929A
公开(公告)日：1989-08-01
申请号：US164483
申请日：1988-03-04
申请人： Isao Azuma , Miyuki Ishida , Naozumi Aoki
发明人： Isao Azuma , Miyuki Ishida , Naozumi Aoki
IPC分类号： G01R31/3185
CPC分类号： G01R31/318569 , G01R31/318558
摘要： An electronic circuit device able to diagnose a status-holding circuit by scanning, the device comprising a first plurality of integrated circuits each including a serial scan circuit for receiving serial data, generating an address value of a target status-holding circuit as parallel data from the received serial data, and selecting the target status-holding circuit having the generated address value, and a second plurality of integrated circuits each including a parallel scan circuit for receiving an address value of a target status-holding circuit as parallel data and selecting the target status-holding circuit having the received address value. Address information received as serial data being used for generating parallel address information, and address information received as parallel data being used for generating serial address information.

4. 发明授权

US4760546A Tag control circuit for increasing throughput of main storage access 失效
标题翻译：标签控制电路，用于提高主存储访问的吞吐量
公开(公告)号：US4760546A
公开(公告)日：1988-07-26
申请号：US746536
申请日：1985-06-19
申请人： Miyuki Ishida , Takashi Chiba
发明人： Miyuki Ishida , Takashi Chiba
IPC分类号： G06F12/08 , G06F13/00
CPC分类号： G06F12/126 , G06F12/0822 , G06F2212/1032
摘要： A tag control circuit is provided in a memory access control apparatus of a digital computer system which also includes a central processor having a buffer storage. The tag control circuit includes a tag information store and update circuit and a necessity operation circuit for determining whether invalidation of the tag information and whether transmission of an invalidation information to the central processor are necessary. The tag control circuit also includes a first storage for storing a plurality of access requests of the invalidation operation determined by the necessity operation circuit, a second storage for storing a plurality of invalidation execute information determined by the necessity operation circuit, and a selection circuit receiving a new access request and an access request stored in the first storage and outputting one access request. The tag control circuit may further include a third circuit storage for storing only store access requests before supplying them to the necessity operation circuit, the third storage having an output connected to the request receiving and outputting circuit. The access selection circuit may output one request at a time the following priority order: a new read access request before an access request stored in the first storage and either before a store access request stored in the third storage.
摘要翻译：标签控制电路设置在数字计算机系统的存储器访问控制装置中，该数字计算机系统还包括具有缓冲存储器的中央处理器。标签控制电路包括标签信息存储和更新电路以及用于确定是否需要向中央处理器发送无效信息的标签信息的无效的必要性操作电路。标签控制电路还包括用于存储由必要性运算电路确定的无效化操作的多个访问请求的第一存储器，存储由必要性运算电路确定的多个无效执行信息的第二存储器，以及选择电路存储在第一存储器中的新的访问请求和访问请求，并输出一个访问请求。标签控制电路还可以包括第三电路存储器，用于仅在存储访问请求被提供给必要性操作电路之前存储访问请求，第三存储器具有连接到请求接收和输出电路的输出。访问选择电路可以在以下优先级顺序输出一个请求：在存储在第一存储器中的存取请求之前和在存储在第三存储器中的存储访问请求之前的新的读访问请求。

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