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1. 发明授权

US5841308A Amplifier for cancelling noise between circuit systems 失效
标题翻译：用于消除电路系统之间的噪声的放大器
公开(公告)号：US5841308A
公开(公告)日：1998-11-24
申请号：US848269
申请日：1997-04-29
申请人： Mitsuru Nagata
发明人： Mitsuru Nagata
IPC分类号： H04R3/00 , G11B20/02 , H03F1/26 , H03F3/45 , H03L5/00
CPC分类号： H03F1/26 , H03F3/45475 , H03F3/45973 , H03F2200/189 , H03F2200/372
摘要： A reference potential difference canceling circuit is provided in a circuit system of a transmitter side to remove noise caused by impedance Z between circuit systems having different reference potentials from a signal, and to transmit the signal. The reference potential of the circuit system of a receiver side is supplied to an input terminal of the reference potential difference canceling circuit, and its output terminal is connected to an input terminal of an output amplifier to which a transmitting signal is input. A gain of the reference potential difference canceling circuit is set to a reciprocal number of a gain of the output amplifier.
摘要翻译：在发射机侧的电路系统中提供参考电位差消除电路，以从信号中去除具有不同参考电位的电路系统之间由阻抗Z引起的噪声，并发送信号。接收器侧的电路系统的参考电位被提供给参考电位差消除电路的输入端，并且其输出端连接到输入发射信号的输出放大器的输入端。参考电位差消除电路的增益被设置为输出放大器的增益的倒数。

2. 发明授权

US5789980A Amplifier and semiconductor device which are operated at a low voltage 失效
标题翻译：以低电压工作的放大器和半导体器件
公开(公告)号：US5789980A
公开(公告)日：1998-08-04
申请号：US791056
申请日：1997-01-28
申请人： Mitsuru Nagata , Mariko Terada
发明人： Mitsuru Nagata , Mariko Terada
IPC分类号： H03F3/30 , H03F3/45
CPC分类号： H03F3/3001
摘要： An amplifier and a semiconductor device according to the present invention are operated at a low voltage and decreased in size and problems such as a noise and an oscillation phenomenon. The amplifier and semiconductor device each includes a first bias generation circuit for generating first and second bias voltages when V1.gtoreq.V2, where V1 is the power supply voltage and V2 is the lower limit of the operation limiting voltage, and for outputting a zero potential when V1 V1.gtoreq.V3, where V3 ( V1.gtoreq.V3.
摘要翻译：根据本发明的放大器和半导体器件在低电压下操作并且尺寸减小以及噪声和振荡现象等问题。放大器和半导体器件各自包括第一偏置产生电路，用于当V1> / = V2时产生第一和第二偏置电压，其中V1是电源电压，V2是操作限制电压的下限，并且用于输出零当V1 V1> / = V3时将零电位向第二放大电路提供偏置电流，其中V3（ / = V2时打开输出端子。当V1> / = V2时，第二放大电路进行推挽操作，当V2> V1> / = V3时，只有一个推挽晶体管进行放大操作。

3. 发明授权

US5610606A 1-bit D/A conversion circuit 失效
标题翻译： 1位D / A转换电路
公开(公告)号：US5610606A
公开(公告)日：1997-03-11
申请号：US277265
申请日：1994-07-21
申请人： Toshitaka Fukunaga , Mitsuru Nagata
发明人： Toshitaka Fukunaga , Mitsuru Nagata
IPC分类号： H03M1/08 , H03M3/02 , H03M3/00
CPC分类号： H03M3/348 , H03M3/502
摘要： A 1-bit D/A conversion circuit according to the present invention comprises an RZ signal generating circuit and a PRZ signal generating circuit. The RZ signal generating circuit receives 1-bit digital data sampled at a predetermined frequency, converts the digital data into a first RZ signal and a second RZ signal complementary to the first RZ signal, shifts the first and second RZ signals with respect to each other by an integral multiple of the predetermined frequency, which is greater than one, and outputs these RZ signals. The PRZ signal generating circuit receives the first and second RZ signals, combines these signals together, and outputs a signal which is a type of a PRZ signal.
摘要翻译：根据本发明的1位D / A转换电路包括RZ信号发生电路和PRZ信号发生电路。 RZ信号发生电路接收以预定频率采样的1位数字数据，将数字数据转换成与第一RZ信号互补的第一RZ信号和第二RZ信号，使第一和第二RZ信号相对于彼此移位以大于1的预定频率的整数倍，并输出这些RZ信号。 PRZ信号发生电路接收第一和第二RZ信号，将这些信号组合在一起，并输出作为PRZ信号类型的信号。

4. 发明授权

US5202685A Digital sigma-delta modulator having a limiter circuit 失效
标题翻译：具有限幅电路的数字SIGMA-DELTA调制器
公开(公告)号：US5202685A
公开(公告)日：1993-04-13
申请号：US762375
申请日：1991-09-19
申请人： Mitsuru Nagata
发明人： Mitsuru Nagata
IPC分类号： H03M7/36 , H03M7/00 , H03M7/32
CPC分类号： H03M7/3042 , H03M7/3028
摘要： A digital sigma-delta modulator comprises an adder, a quantizer, a subtracter, a filter circuit, and a limiter circuit. The adder adds input digital data and feedback data. The quantizer quantizes output data of the adder. The subtracter calculates a difference between output data of the quantizer and that of the adder. The filter circuit digitally processes output data of the subtracter to generate the feedback data. The limiter circuit is arranged in at least one position within an operation loop looping the adder, subtracter, and filter circuit and extracts (n-m)-bit data acquired by eliminating the significant m bit other than MSB from an n-bit data line.

5. 发明授权

US4379268A Differential amplifier circuit 失效
标题翻译：差分放大电路
公开(公告)号：US4379268A
公开(公告)日：1983-04-05
申请号：US171755
申请日：1980-07-24
申请人： Mitsuru Nagata
发明人： Mitsuru Nagata
IPC分类号： H03F3/45
CPC分类号： H03F3/4521 , H03F3/45071 , H03F2203/45366
摘要： A differential amplifier circuit having constant mutual conductance characteristics. The circuit comprises first and second differential amplifier units in which each of the emitters of two transistors are connected to a common constant current source via respective diode-junction stacks or resistors. The bases of the individual transistors in the first amplifier unit are connected to different ones of the transistors in the second amplifier unit. On the other hand, the collectors of the individual transistors of the first unit are connected to different ones of the collectors of the second unit, wherein the bases are not connected to each other. Further, the diode-junction stacks or the resistors in the same amplifier unit have the same numbers of diodes or the same resistance, but differ between the amplifier units.
摘要翻译：具有恒定互导特性的差分放大器电路。该电路包括第一和第二差分放大器单元，其中两个晶体管的每个发射极通过相应的二极管结堆栈或电阻器连接到公共恒流源。第一放大器单元中的各个晶体管的基极连接到第二放大器单元中的不同的晶体管。另一方面，第一单元的单个晶体管的集电极连接到第二单元的不同的集电极，其中基极彼此不连接。此外，二极管结叠层或同一放大器单元中的电阻器具有相同数量的二极管或相同的电阻，但在放大器单元之间不同。

6. 发明授权

US06236349B1 Analog-digital converter analog-digital converting method and volume controller system 有权
标题翻译：模拟数字转换器模拟数字转换方法和音量控制器系统
公开(公告)号：US06236349B1
公开(公告)日：2001-05-22
申请号：US09236637
申请日：1999-01-26
申请人： Mitsuru Nagata
发明人： Mitsuru Nagata
IPC分类号： H03M134
CPC分类号： H03M1/0675 , H03M1/56
摘要： An analog-digital converter capable of outputting stable conversion codes even when an analog signal is input in the vicinity of a boundary between adjacent analog-digital conversion regions. The analog-digital converter as described is provided with ignoring regions between the conversion regions. When the signal level of the analog signal is located within one of the ignoring regions, the analog-digital conversion code outputted from the output circuit is maintained in a next period.
摘要翻译：即使当模拟信号被输入到相邻的模拟数字转换区域之间的边界附近时，也能够输出稳定的转换代码的模拟数字转换器。所描述的模拟 - 数字转换器设置有忽略转换区域之间的区域。当模拟信号的信号电平位于一个忽略区域内时，从输出电路输出的模拟数字转换代码保持在下一个周期。

7. 发明授权

US6114981A D/A converter 失效
标题翻译： D / A转换器
公开(公告)号：US6114981A
公开(公告)日：2000-09-05
申请号：US205365
申请日：1998-12-04
申请人： Mitsuru Nagata
发明人： Mitsuru Nagata
IPC分类号： H03M1/08 , H03M3/02 , H03M3/04 , H03M3/00 , H03M1/66
CPC分类号： H03M3/348 , H03M3/50
摘要： There is provided an over-sampling D/A converter which has a mute function for fixing an average DC potential of an analog output signal to a predetermined potential, and comprises a .SIGMA. .DELTA. modulator for receiving a multibit digital signal to which a DC offset value is added and then outputting a one-bit non-return-to-zero signal, a signal generator for receiving the non-return-to-zero signal and the clock signal, then generating a return-to-zero signal which is a logical multiplication of the non-return-to-zero signal and the clock signal and a complementary signal of the return-to-zero signal which is a logical addition of the non-return-to-zero signal and an inverted signal of the clock signal, and then adding the return-to-zero signal to the complementary signal of the return-to-zero signal to thus output a polar-return-to-zero signal, and an analog filter for receiving the polar-return-to-zero signal and then outputting an analog signal. Accordingly, because an average DC potential of an output signal at the time of the mute operation-ON is set substantially equal to the average DC potential of the output signal at the time of the mute operation-OFF, variation in the average DC potential in the output signal due to ON/OFF of the mute operation can be prevented. As a result, generation of audible click noises can be prevented.
摘要翻译：提供了一种过采样D / A转换器，其具有用于将模拟输出信号的平均DC电位固定为预定电位的静音功能，并且包括用于接收多位数字信号的SIGMA DELTA调制器，其中DC偏移值然后输出一位非归零信号，用于接收非归零信号和时钟信号的信号发生器，然后产生归零信号，该信号是逻辑非归零信号与时钟信号的相乘以及归零信号的互补信号，其是非归零信号的逻辑加法和时钟信号的反相信号，然后将归零信号添加到归零信号的互补信号，从而输出极点归零信号，以及模拟滤波器，用于接收极零返回零信号，然后输出模拟信号。因此，由于将静音操作ON时的输出信号的平均直流电位设定为与静音动作OFF时的输出信号的平均DC电位基本相等，所以平均DC电位的变化可以防止由于静音操作的ON / OFF引起的输出信号。结果，可以防止产生可听见的咔嗒声。

8. 发明授权

US06900752B2 Stepwise zero-data-detection mute circuit 失效
标题翻译：逐步的零数据检测静音电路
公开(公告)号：US06900752B2
公开(公告)日：2005-05-31
申请号：US10619616
申请日：2003-07-16
申请人： Toshikazu Oda , Mitsuru Nagata , Hiroyuki Eguchi
发明人： Toshikazu Oda , Mitsuru Nagata , Hiroyuki Eguchi
IPC分类号： H03M1/08 , H03F1/00 , H03M1/66 , H03M3/00 , H03M3/04 , H03M7/32 , H03M1/78
CPC分类号： H03M3/346 , H03M3/50
摘要： A variable resistance device is disclosed, which comprises a first variable resistance circuit and analog switches, a second variable resistance circuit including series-connected first and second resistors, one terminal of the first resistor connected to one terminal of the second resistor and the other terminal connected to one terminal of the first variable resistance circuit, a series-resistor circuit one terminal of which is connected to the other terminal of the second resistor, analog switches connected between the other terminal of the first resistor and nodes of respective resistors of the series-resistor circuit, an analog switch connected between the other terminal of the series-resistor circuit and a node of the first and second resistors, an analog switch connected between a node of the resistors of the series-resistor circuit and the node of the first and second resistors, and a short-circuiting analog switch connected between the first and second variable resistance circuits.
摘要翻译：公开了一种可变电阻装置，其包括第一可变电阻电路和模拟开关，第二可变电阻电路，包括串联的第一和第二电阻器，第一电阻器的一个端子连接到第二电阻器的一个端子，另一个端子连接到第一可变电阻电路的一个端子，串联电阻器电路，其一端连接到第二电阻器的另一端子，连接在第一电阻器的另一端子与串联的各个电阻器的节点之间的模拟开关电阻电路，连接在串联电阻电路的另一端子与第一和第二电阻器的节点之间的模拟开关，连接在串联电阻电路的电阻器的节点和第一电阻器的节点之间的模拟开关和第二电阻器，以及连接在第一和第二可变电阻环之间的短路模拟开关 uits。

9. 发明授权

US06366228B2 Selecting circuit, digital/analog converter and analog/digital converter 有权
标题翻译：选择电路，数/模转换器和模拟/数字转换器
公开(公告)号：US06366228B2
公开(公告)日：2002-04-02
申请号：US09817044
申请日：2001-03-27
申请人： Mitsuru Nagata
发明人： Mitsuru Nagata
IPC分类号： H03M166
CPC分类号： H03M1/0665 , H03M1/747 , H03M3/464 , H03M3/502
摘要： A pair of internal signals are generated by halving a 3-bit 5-valued input signal, neglecting the least significant bit LSB. If the input signal shows the value of an odd number, 1 is added to either of the pair of internal signals to generate first and second signals. “1” is added to either of the pair of internal signals in an alternating way each time an input signal having the value of an odd number. Signal processing circuits selects a number of output terminals corresponding to the value of the first signal or the second signal out of a plurality of output terminals. All the output terminals are selected with a same probability.
摘要翻译：通过将3位5值输入信号减半，忽略最低有效位LSB来产生一对内部信号。如果输入信号显示奇数值，则将1加到该对内部信号中以产生第一和第二信号。每当具有奇数值的输入信号时，以交替的方式将“1”添加到该对内部信号中的任何一个。信号处理电路选择与多个输出端子中的第一信号或第二信号的值对应的多个输出端子。以相同的概率选择所有输出端子。

10. 发明授权

US4580100A Phase locked loop clock recovery circuit for data reproducing apparatus 失效
标题翻译：用于数据再现装置的锁相环时钟恢复电路
公开(公告)号：US4580100A
公开(公告)日：1986-04-01
申请号：US563259
申请日：1983-12-19
申请人： Hiroshi Suzuki , Tadashi Kojima , Mitsuru Nagata
发明人： Hiroshi Suzuki , Tadashi Kojima , Mitsuru Nagata
IPC分类号： G11B20/14 , H03L7/089 , H03K9/00 , H03L7/08
CPC分类号： G11B20/1403 , H03L7/0891
摘要： A data reproduction circuit, which can be used for reproducing audio data from an optical disc, includes a phase-locked loop which has a circuit for detecting polarity inversions of the input signal, a circuit for comparing the phases of a polarity inversion signal with a reference signal, and circuitry for generating an output clock signal which is phase-locked with the input signal, that clock being used to strobe the input signal to remove fluctuation and jitter from the input signal.
摘要翻译：可以用于从光盘再现音频数据的数据再现电路包括：锁相环，其具有用于检测输入信号的极性反转的电路，用于将极性反转信号的相位与参考信号和用于产生与输入信号锁相的输出时钟信号的电路，该时钟用于选通输入信号以从输入信号中去除波动和抖动。

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