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    • 1. 发明授权
    • All optical processing circuit for conflict resolution and switch configuration in a 2×2 optical node
    • 用于2×2光节点中的冲突解决和开关配置的所有光学处理电路
    • US09137591B2
    • 2015-09-15
    • US12597784
    • 2007-05-01
    • Antonella BogoniLuca PotiMirco Scaffardi
    • Antonella BogoniLuca PotiMirco Scaffardi
    • G02F3/00H04Q11/00
    • H04Q11/0005G02F3/00H04Q11/0066H04Q2011/0015H04Q2011/002H04Q2011/0039H04Q2011/0041H04Q2011/005H04Q2011/0052H04Q2011/0058
    • An optical processing circuit, such as a combinatorial network, comprises an arrangement of optical logic gates suitable for use in combination with a switched optical node of the kind having at least first and second input ports and two output ports, the node being configurable into either a cross or a bar configuration, and in which the optical processing circuit is arranged so as to receive at least three optical input signals which respectively comprise a packet identifier signal PIH which identifies whether or not a first input signal is present at the first input port of the switched optical node, the first input port being assigned a higher priority than the second input port, a first destination address AH indicating the output port of the switched optical node to which a first information carrying signal, received at the first input port, is intended to be passed, and a second destination address AL indicating the output port of the switched optical node to which a second information carrying signal, received at the second input port, is intended to be passed, and in which the processing circuit is configured to generate from these three optical input signals the following optical output signals: a contention resolution control (CRC) signal which has a first value if a routing conflict is present and a second if it is not; and a switch control generation (SCG) signal indicating whether the associated switched optical node is to be set in a cross or bar configuration.
    • 诸如组合网络的光学处理电路包括适于与具有至少第一和第二输入端口和两个输出端口的类型的交换光学节点组合使用的光学逻辑门的布置,该节点可配置为 交叉或条形配置,并且其中所述光学处理电路被布置为接收至少三个光学输入信号,所述至少三个光学输入信号分别包括分组标识符信号PIH,所述分组标识符信号表示第一输入信号是否存在于所述第一输入端口 所述第一输入端口被分配比所述第二输入端口更高的优先级;第一目的地地址AH,其指示在所述第一输入端口处接收到的第一信息携带信号的所述交换光节点的输出端口, 以及第二目的地地址AL,其指示切换的光节点的输出端口,其中具有第二信息 旨在通过在第二输入端口接收的定位承载信号,并且其中处理电路被配置为从这三个光学输入信号产生以下光学输出信号:竞争解决控制(CRC)信号,其具有 如果存在路由冲突,则为第一个值,如果不存在路由冲突则为第二个值; 以及指示是否将相关联的交换光节点设置为交叉或条形配置的开关控制产生(SCG)信号。
    • 2. 发明申请
    • OPTICAL ANALOGUE TO DIGITAL CONVERTER
    • 数字转换器的光学模拟
    • US20110234436A1
    • 2011-09-29
    • US13127085
    • 2008-10-31
    • Antonella BogoniFrancesco FresiEmma LazzeriMirco ScaffardiLuca Poti
    • Antonella BogoniFrancesco FresiEmma LazzeriMirco ScaffardiLuca Poti
    • H03M1/12
    • G02F7/00G02F1/3515G02F2203/70
    • An analogue to digital converter (100) is arranged to receive and process an analogue optical input signal (110) to produce an N bit digital optical output signal (140) quantised to 2N levels, where N is greater than or equal to 2. The converter (100) has an input (115) for receiving the optical input signal (110) and N processing channels (131, 132, 133) which arc each coupled to the input, at least one of said processing channels comprising an optical processing circuit (201, 202, 203, 204, 205, 206, 207) arranged to generate a plurality of digital optical output signals. The optical processing circuit is arranged to change the state of each digital optical output signal corresponding to a respective different value of the analogue optical input signal, and an optical combining circuit (301, 302, 303, 304) for combining the optical output signals in signal order to generate one bit of the N-bit digital optical signal.
    • 模拟数字转换器(100)被布置为接收和处理模拟光输入信号(110)以产生量化为2N级的N位数字光输出信号(140),其中N大于或等于2。 转换器(100)具有用于接收光输入信号(110)的输入端(115)和各自耦合到输入端的N个处理通道(131,132,133),所述处理通道中的至少一个包括光处理电路 (201,202,203,204,205,206,207),被布置成产生多个数字光输出信号。 光处理电路被配置为改变对应于模拟光输入信号的相应不同值的每个数字光输出信号的状态,以及光合成电路(301,302,303,304),用于将光输出信号 信号顺序产生一位N位数字光信号。
    • 3. 发明申请
    • ETHERNET TRANSMITTER APPARATUS
    • 以太网发射机设备
    • US20100316377A1
    • 2010-12-16
    • US12677165
    • 2008-03-17
    • Mirco ScaffardiGianluca BerrettiniRodolfo Di MuroBimal NayarAntonella BogoniLuca Poti
    • Mirco ScaffardiGianluca BerrettiniRodolfo Di MuroBimal NayarAntonella BogoniLuca Poti
    • H04J14/08
    • H04J14/06H04J14/08
    • An optical transmitter apparatus capable of a transmission rate of at least 100 gbit/second comprises at least three input transmitters that each provide at an output an NRZ optical signal, at least two of the NRZ optical signals having substantially the same bit rate, each of the signals having a bit rate which is less than 100 Gbit/s and the sum of the bit rates of all of the at least three transmitters being at least equal to 100 Gbit/s, an NRZ to RZ converter associated with each transmitter which converts each NRZ signal into an optical RZ signal with the signal remaining in the optical domain during conversion, the optical RZ signal having the same bit rate as the corresponding NRZ signal, an optical time division multiplexer which converts the RZ signals into at least two further signals, one of the further signals being formed by bitwise interleaving the bits of the at least two of the RZ signals which have the same bit rate, and a polarisation multiplexer which processes the two further signals to provide two output signals of differing polarisation, each of the two output signals having the same bit rate as a respective one of the two further signals. The NRZ to RZ converters may be implemented using a SOA based device.
    • 能够具有至少100吉比特/秒的传输速率的光发射机设备包括至少三个输入发射机,每个至少三个输入发射机在输出端提供NRZ光信号,NRZ光信号中的至少两个具有基本上相同的比特率, 具有小于100Gbit / s的比特率和所有至少三个发射机的比特率的总和至少等于100Gbit / s的信号,与每个发射机相关联的NRZ至RZ转换器,其转换 每个NRZ信号转换为在转换期间信号保留在光域中的光学RZ信号,光学RZ信号具有与相应的NRZ信号相同的比特率,光学时分复用器将RZ信号转换成至少两个另外的信号 通过对具有相同比特率的RZ信号中的至少两个的比特进行逐位交织来形成另外的信号之一,以及处理该t的多路复用器 还提供信号以提供不同极化的两个输出信号,两个输出信号中的每一个具有与两个另外的信号中的相应一个相同的比特率。 NRZ到RZ转换器可以使用基于SOA的设备来实现。
    • 4. 发明申请
    • ALL OPTICAL PROCESSING CIRCUIT FOR CONFLICT RESOLUTION AND SWITCH CONFIGURATION IN A 2X2 OPTICAL NODE
    • 所有用于2X2光学节点中的冲突分辨率和开关配置的光学处理电路
    • US20100208317A1
    • 2010-08-19
    • US12597784
    • 2007-05-01
    • Antonella BogoniLuca PotiMirco Scaffardi
    • Antonella BogoniLuca PotiMirco Scaffardi
    • G02F3/00
    • H04Q11/0005G02F3/00H04Q11/0066H04Q2011/0015H04Q2011/002H04Q2011/0039H04Q2011/0041H04Q2011/005H04Q2011/0052H04Q2011/0058
    • An optical processing circuit, such as a combinatorial network, comprises an arrangement of optical logic gates suitable for use in combination with a switched optical node of the kind having at least first and second input ports and two output ports, the node being configurable into either a cross or a bar configuration, and in which the optical processing circuit is arranged so as to receive at least three optical input signals which respectively comprise a packet identifier signal PIH which identifies whether or not a first input signal is present at the first input port of the switched optical node, the first input port being assigned a higher priority than the second input port, a first destination address AH indicating the output port of the switched optical node to which a first information carrying signal, received at the first input port, is intended to be passed, and a second destination address AL indicating the output port of the switched optical node to which a second information carrying signal, received at the second input port, is intended to be passed, and in which the processing circuit is configured to generate from these three optical input signals the following optical output signals: a contention resolution control (CRC) signal which has a first value if a routing conflict is present and a second if it is not; and a switch control generation (SCG) signal indicating whether the associated switched optical node is to be set in a cross or bar configuration.
    • 诸如组合网络的光学处理电路包括适于与具有至少第一和第二输入端口和两个输出端口的类型的交换光学节点组合使用的光学逻辑门的布置,该节点可配置为 交叉或条形配置,并且其中所述光学处理电路被布置为接收至少三个光学输入信号,所述至少三个光学输入信号分别包括分组标识符信号PIH,所述分组标识符信号表示第一输入信号是否存在于所述第一输入端口 所述第一输入端口被分配比所述第二输入端口更高的优先级;第一目的地地址AH,其指示在所述第一输入端口处接收到的第一信息携带信号的所述交换光节点的输出端口, 以及第二目的地地址AL,其指示切换的光节点的输出端口,其中具有第二信息 旨在通过在第二输入端口接收的定位承载信号,并且其中处理电路被配置为从这三个光学输入信号产生以下光学输出信号:竞争解决控制(CRC)信号,其具有 如果存在路由冲突,则为第一个值,如果不存在路由冲突则为第二个值; 以及指示是否将相关联的交换光节点设置为交叉或条形配置的开关控制产生(SCG)信号。
    • 7. 发明授权
    • Optical linear feedback circuit
    • 光学线性反馈电路
    • US08699888B2
    • 2014-04-15
    • US13041968
    • 2011-03-07
    • Mirco ScaffardiGianluca BerrettiniAntonella Bogoni
    • Mirco ScaffardiGianluca BerrettiniAntonella Bogoni
    • H04B10/299G02F3/00
    • G06E1/02G11C13/04G11C19/00G11C21/00
    • An optical linear feedback circuit has an optical loop delay path (10) for recirculating a sequence of optical signals, and an output path for outputting delayed optical signals after circulating one or more times around the loop. A selector (50) is provided for selecting one or more of the delayed optical signals from the sequence, and an optical logic circuit (20) is coupled to carry out a logical operation on the selected delayed optical signals to create an optical feedback signal which is coupled to the optical loop delay path, so that the optical feedback signal can be added to the sequence of optical signals already circulating. By recirculating around a loop, each round trip can be regarded as equivalent to a shift of a shift register, so longer sequences can be built up without needing an additional storage cell for each shift function.
    • 光学线性反馈电路具有用于再循环光信号序列的光环路延迟路径(10),以及用于在环路循环一次或多次之后输出延迟光信号的输出路径。 选择器(50)被提供用于从该序列中选择一个或多个延迟的光信号,并且光学逻辑电路(20)被耦合以对所选择的延迟光信号执行逻辑运算以产生光反馈信号, 耦合到光环路延迟路径,使得光反馈信号可以被添加到已经循环的光信号序列中。 通过循环循环,每次往返可被认为等同于移位寄存器的移位,因此可以建立更长的序列,而不需要每个移位函数的附加存储单元。
    • 9. 发明申请
    • Optical Circuit for Comparing Two N-Bit Binary Words
    • 用于比较两个N位二进制字的光电路
    • US20090059331A1
    • 2009-03-05
    • US12183662
    • 2008-07-31
    • Antonella BogoniLuca PotiMirco Scaffardi
    • Antonella BogoniLuca PotiMirco Scaffardi
    • G02F3/00
    • G02F3/00G02F1/3515G02F2203/70
    • An optical comparator circuit comprises a first stage comprising an optical gate which receives the signals applied to the two inputs and produces at its output an N bit signal with each bit being representative of the logical expression A XOR B for a respective pair of bits of the words A and B, a second stage which comprises an optical gate having at least two inputs, a first input being connected to the output of the first stage by an optical connection having a first time delay, and a second input being connected to the output of the first stage through (N−1) further optical connections, each further connection having a different associated time delay which is longer than the first time delay, the second stage providing at its output a signal comprising N bits, each bit corresponding to a respective bit of the signal output from the first stage at that time, and each bit having a first value if all of the inputs to the stage at that time are equal and a second value if and only if the first input differs in value from all of the second inputs, and a third stage which comprises an optical gate having two inputs, the first input being connected to the first input node of the comparator circuit and the second input being connected to the output of the second stage, the output of the third stage comprising an N-bit signal with each bit having a first value if the inputs at that time differ and a second value if the inputs at that time are the same, the presence of the second value in the output being indicative of word A being greater than word B.
    • 光学比较器电路包括第一级,其包括光栅,其接收施加到两个输入的信号,并在其输出端产生一个N位信号,其中每个位表示逻辑表达式A XOR B,用于相应的位对 字A和B,第二级,其包括具有至少两个输入的光栅,第一输入通过具有第一时间延迟的光学连接连接到第一级的输出,第二输入连接到输出 (N-1)个进一步的光学连接,每个另外的连接具有比第一时间延迟更长的不同的相关时间延迟,第二级在其输出端提供包括N位的信号,每个位对应于 在该时间从第一级输出的信号的相应位,如果当时的所有阶段的所有输入都相等,并且每个位具有第一值,并且当且仅当 第一输入的值与所有第二输入不同,第三级包括具有两个输入的光栅,第一输入连接到比较器电路的第一输入节点,第二输入端连接到 第二级,如果第二级的输入相同,那么第三级的输出包括一个N位信号,其中每个位具有第一值,如果该时间的输入相同,则第二值如果该时间的输入相同,则存在第二值 在输出中表示词A大于词B.