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1. 发明授权

US07272527B1 Method of test of clock generation circuit in electronic device, and electronic device 失效
标题翻译：电子设备中时钟发生电路的测试方法和电子设备
公开(公告)号：US07272527B1
公开(公告)日：2007-09-18
申请号：US11487504
申请日：2006-07-17
申请人： Hiroyuki Suto , Masahide Kanegae , Osamu Kawashima , Michihiko Umeda
发明人： Hiroyuki Suto , Masahide Kanegae , Osamu Kawashima , Michihiko Umeda
IPC分类号： G01M19/00
CPC分类号： G01R31/31727
摘要： In an electronic device having an interface circuit which operates using a fast clock source, frequency deviation of the clock source is inspected in the mounted state. The clock pulses of the fast clock source are counted in synchronization with an electronic device serving as reference, and the result is checked; or, alignment data of transfer data and overflow/underflow of the FIFO buffer are utilized; or, the count values of an internal counter and a fast clock counter are utilized, to check for frequency deviation of the fast clock source. In the state of being mounted in the device, tests can be performed of the clock sources of all units.
摘要翻译：在具有使用快速时钟源工作的接口电路的电子设备中，在安装状态下检查时钟源的频率偏差。快速时钟源的时钟脉冲与作为参考的电子设备同步计数，并检查结果; 或者使用FIFO缓冲器的传送数据和溢出/下溢的对准数据; 或者使用内部计数器和快速时钟计数器的计数值来检查快速时钟源的频率偏差。在安装在设备中的状态下，可以对所有单元的时钟源进行测试。

2. 发明申请

US20100328812A1 MAGNETIC DISK DEVICE 审中-公开
标题翻译：磁盘设备
公开(公告)号：US20100328812A1
公开(公告)日：2010-12-30
申请号：US12823052
申请日：2010-06-24
申请人： Masamitsu OHHASHI , Michihiko UMEDA
发明人： Masamitsu OHHASHI , Michihiko UMEDA
IPC分类号： G11B5/596
CPC分类号： G11B19/048 , G11B20/1816 , G11B20/1879 , G11B2020/10759 , G11B2020/10777 , G11B2020/1826 , G11B2220/2516
摘要： According to one embodiment, a magnetic disk device includes a receiver, a storage module, a determining module, and a prescanner. The receiver receives a command from a host device. The storage module stores, with respect to each of divided areas formed by dividing the recording area of a recording medium into a plurality of areas, pre-scan control information indicating at least one of the receiving time and the number of receiving times. The receiving time indicates a time at which a write command is received. The number of receiving times indicates the number of times the write command is received within a predetermined period after the power is turned on. The determining module determines the order in which pre-scan is performed on the divided areas based on at least one of the receiving time and the number of receiving times. The prescanner pre-scans the divided areas in the determined order.
摘要翻译：根据一个实施例，磁盘装置包括接收器，存储模块，确定模块和预分配器。接收器从主机设备接收命令。存储模块相对于通过将记录介质的记录区域划分为多个区域而形成的每个分割区域存储指示接收时间和接收次数中的至少一个的预扫描控制信息。接收时间表示接收到写入命令的时间。接收次数指示在接通电源之后的预定时间段内写入命令的次数。确定模块基于接收时间和接收次数中的至少一个来确定对划分区域执行预扫描的顺序。预分配器按照确定的顺序对分割的区域进行预扫描。

3. 发明申请

US20070233411A1 METHOD OF TEST OF CLOCK GENERATION CIRCUIT IN ELECTRONIC DEVICE, AND ELECTRONIC DEVICE 失效
标题翻译：电子设备中的时钟发生电路的测试方法和电子设备
公开(公告)号：US20070233411A1
公开(公告)日：2007-10-04
申请号：US11487504
申请日：2006-07-17
申请人： Hiroyuki Suto , Masahide Kanegae , Osamu Kawashima , Michihiko Umeda
发明人： Hiroyuki Suto , Masahide Kanegae , Osamu Kawashima , Michihiko Umeda
IPC分类号： G06F19/00 , G01R35/00
CPC分类号： G01R31/31727
摘要： In an electronic device having an interface circuit which operates using a fast clock source, frequency deviation of the clock source is inspected in the mounted state. The clock pulses of the fast clock source are counted in synchronization with an electronic device serving as reference, and the result is checked; or, alignment data of transfer data and overflow/underflow of the FIFO buffer are utilized; or, the count values of an internal counter and a fast clock counter are utilized, to check for frequency deviation of the fast clock source. In the state of being mounted in the device, tests can be performed of the clock sources of all units.
摘要翻译：在具有使用快速时钟源工作的接口电路的电子设备中，在安装状态下检查时钟源的频率偏差。快速时钟源的时钟脉冲与作为参考的电子设备同步计数，并检查结果; 或者使用FIFO缓冲器的传送数据和溢出/下溢的对准数据; 或者使用内部计数器和快速时钟计数器的计数值来检查快速时钟源的频率偏差。在安装在设备中的状态下，可以对所有单元的时钟源进行测试。

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