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1. 发明申请

US20220012140A1 HARDWARE LOGGING FOR LANE MARGINING AND CHARACTERIZATION 有权
公开(公告)号：US20220012140A1
公开(公告)日：2022-01-13
申请号：US17485180
申请日：2021-09-24
申请人： Debendra Das Sharma , Michelle C. Jen , Swadesh Choudhary , Raghucharan Boddupalli
发明人： Debendra Das Sharma , Michelle C. Jen , Swadesh Choudhary , Raghucharan Boddupalli
IPC分类号： G06F11/14 , G06F13/42
摘要： A device includes a port with a replay buffer and protocol logic to receive a flit in a sequence of flits to be sent on a point-to-point link and determine an error in the flit. Based on the error, a copy of the flit is stored in a first position within the replay buffer as well as a copy of a next flit received in the sequence of flits, which is stored in a second position within the replay buffer. The copies of the flits are then written to a register for access by software.

2. 发明申请

US20190324523A1 ALTERNATE PHYSICAL LAYER POWER MODE 审中-公开
公开(公告)号：US20190324523A1
公开(公告)日：2019-10-24
申请号：US16457930
申请日：2019-06-29
申请人： Michelle C. Jen , David J. Harriman , Zuoguo Wu , Debendra Das Sharma , Noam Dolev Geldbard
发明人： Michelle C. Jen , David J. Harriman , Zuoguo Wu , Debendra Das Sharma , Noam Dolev Geldbard
IPC分类号： G06F1/3234 , G06F1/3225 , G06F3/06
摘要： A device includes physical layer (PHY) circuitry including a physical coding sublayer, where the PHY circuitry is configured to alternatively support at least two different power control settings. The device further includes an interface to couple the PHY circuitry to a media access control (MAC) layer, where the interface comprises a set of data pins, a set of command pins, a set of status pins, one or more clock pins, and a plurality of power control pins to receive an indication of a particular one of the at least two power control settings. The PHY circuitry is to apply parameters corresponding to the particular control setting during operation based on the indication.

3. 发明授权

US07228362B2 Out-of-order servicing of read requests with minimal additional storage 有权
标题翻译：读取请求的无序服务，最小的额外存储空间
公开(公告)号：US07228362B2
公开(公告)日：2007-06-05
申请号：US10815899
申请日：2004-03-31
申请人： Michelle C. Jen , Debendra Das Sharma
发明人： Michelle C. Jen , Debendra Das Sharma
IPC分类号： G06F3/00 , G06F13/00
CPC分类号： G06F13/1626
摘要： Various embodiments of the invention relate to an apparatus and method for efficiently implementing out-of-order servicing of read requests originating from an input/output (I/O) interface with minimal additional storage. For example, a number of read entries may be generated from data read requests stored in a first-in-first-out in a first order. The read entries are stored in a storage device and each read entry identifies internal data reads to read data to service the data read request to which the read entry corresponds. A controller coupled to the storage structure may then submit the internal data reads a central arbiter to read data in a second order that is different than the first order. Moreover, the controller also allows the second order to include internal data reads from one read entry, before a completing servicing of another partially serviced read entry, thus providing “simultaneous” servicing of several read entries.
摘要翻译：本发明的各种实施例涉及一种用于以最小额外存储有效地实现源自输入/输出（I / O）接口的读取请求的无序服务的装置和方法。例如，可以从以第一顺序先进先出存储的数据读取请求生成多个读入条目。读取的条目存储在存储设备中，并且每个读取条目标识内部数据读取以读取数据以服务读取条目对应的数据读取请求。耦合到存储结构的控制器然后可以提交内部数据读取中央仲裁器，以与第一顺序不同的第二顺序读取数据。此外，控制器还允许在对另一部分服务读取条目进行完成服务之前，第二顺序包括来自一个读取条目的内部数据读取，从而为多个读取条目提供“同时”服务。

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