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1. 发明授权

US5848277A Method for providing both level-sensitive and edge-sensitive interrupt signals on a serial interface between a peripheral and host 失效
标题翻译：在外设和主机之间的串行接口上提供电平敏感和边沿敏感中断信号的方法
公开(公告)号：US5848277A
公开(公告)日：1998-12-08
申请号：US565653
申请日：1996-02-12
申请人： Michael Lee Javernick , Robert Dennis Crawford
发明人： Michael Lee Javernick , Robert Dennis Crawford
IPC分类号： G06F9/46 , G06F9/48 , G06F13/24 , G06F13/00
CPC分类号： G06F13/24
摘要： A method or protocol for generating an Interrupt Signal for communication between a peripheral device and a host processor having either a level-sensitive or an edge-sensitive interrupt detector. After receiving an active interrupt request, and after confirming that the Chip Select signal is released, the interrupt signal is transitioned to an active level. After receiving an active Chip Select signal and multiple Clock pulses from the host as confirmation of receipt of the Interrupt Signal, the Interrupt Signal is transitioned to its inactive state. If the interrupt request is still pending, and when the Chip Select signal is released, then the Interrupt Signal is again made active. Maintaining the active level for the Interrupt Signal until the confirmation is returned from the host will activate level-sensitive detectors, while edge-sensitive detectors in the host will be activated by the multiple transitions ocurring if the host does not service the interrupt request in the peripheral.
摘要翻译：一种用于产生用于外围设备和具有电平敏感或边缘敏感中断检测器的主处理器之间的通信的中断信号的方法或协议。在接收到一个有效的中断请求后，确认芯片选择信号被释放后，中断信号转换到有效电平。从主机接收到有效的片选信号和多个时钟脉冲作为接收到中断信号的确认信号后，中断信号转变为非活动状态。如果中断请求仍处于待处理状态，并且当芯片选择信号被释放时，中断信号再次被激活。维持中断信号的有效电平，直到从主机返回确认，才会激活电平敏感检测器，而如果主机不服务于主机中的中断请求，主机边缘敏感检测器将被多个转换激活外围设备

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