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    • 1. 发明授权
    • Silicon carbide MOS semiconductor device
    • 碳化硅MOS半导体器件
    • US09041006B2
    • 2015-05-26
    • US12409964
    • 2009-03-24
    • Shun-ichi NakamuraYoshiyuki YonezawaMasahide Gotoh
    • Shun-ichi NakamuraYoshiyuki YonezawaMasahide Gotoh
    • H01L29/15H01L29/66H01L21/04H01L29/08H01L29/78H01L29/861H01L29/06H01L29/16H01L29/423
    • H01L29/7813H01L21/046H01L29/0623H01L29/086H01L29/0878H01L29/1608H01L29/4236H01L29/42368H01L29/6606H01L29/66068H01L29/8613
    • A silicon carbide MOS semiconductor device is disclosed which suppresses degradation of efficiency percentage yield with respect to a breakdown voltage even when a surface region with a high impurity concentration is formed by ion implantation with such a high dose as required for attaining a good ohmic contact. The device has a silicon carbide semiconductor substrate, a voltage blocking layer of a first conductivity type formed on the substrate, a body region of a second conductivity type formed on the voltage blocking layer, a body contact region of the second conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the body contact region having such a high impurity concentration as to impart an ohmic contact, a source contact region of the first conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the source contact region having such a high impurity concentration as to impart an ohmic contact, and a source extension region with an impurity concentration lower than that in the source contact region under the source contact region at a region deeper than a tail part of a bottom region of the source contact region by selective ion implantation, the source extension region having an impurity concentration less than 3×1019 cm−3.
    • 公开了一种碳化硅MOS半导体器件,其即使当通过以达到良好的欧姆接触所需的高剂量的离子注入形成具有高杂质浓度的表面区域时,也可以相对于击穿电压降低效率百分比。 该器件具有碳化硅半导体衬底,形成在衬底上的第一导电类型的电压阻挡层,形成在电压阻挡层上的第二导电类型的体区,形成在第二导电类型的体接触区 通过选择性离子注入,体区域的表面区域,具有如此高的杂质浓度以产生欧姆接触的体接触区域的表面,在身体区域的表面区域中形成的第一导电类型的源极接触区域由 选择性离子注入,源极接触区域的表面具有如此高的杂质浓度以施加欧姆接触,以及源极延伸区域,其源极延伸区域的杂质浓度低于在源极接触区域下的源极接触区域中的杂质浓度 比源极接触区域的底部区域的尾部通过选择性离子注入,源极延伸区域具有杂质 浓度小于3×1019 cm-3。
    • 2. 发明申请
    • SILICON CARBIDE MOS SEMICONDUCTOR DEVICE
    • 硅碳化硅半导体器件
    • US20090236612A1
    • 2009-09-24
    • US12409964
    • 2009-03-24
    • Shun-ichi NakamuraYoshiyuki YonezawaMasahide Gotoh
    • Shun-ichi NakamuraYoshiyuki YonezawaMasahide Gotoh
    • H01L29/161
    • H01L29/7813H01L21/046H01L29/0623H01L29/086H01L29/0878H01L29/1608H01L29/4236H01L29/42368H01L29/6606H01L29/66068H01L29/8613
    • A silicon carbide MOS semiconductor device is disclosed which suppresses degradation of efficiency percentage yield with respect to a breakdown voltage even when a surface region with a high impurity concentration is formed by ion implantation with such a high dose as required for attaining a good ohmic contact. The device has a silicon carbide semiconductor substrate, a voltage blocking layer of a first conductivity type formed on the substrate, a body region of a second conductivity type formed on the voltage blocking layer, a body contact region of the second conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the body contact region having such a high impurity concentration as to impart an ohmic contact, a source contact region of the first conductivity type formed in a surface region of the body region by selective ion implantation, a surface of the source contact region having such a high impurity concentration as to impart an ohmic contact, and a source extension region with an impurity concentration lower than that in the source contact region under the source contact region at a region deeper than a tail part of a bottom region of the source contact region by selective ion implantation, the source extension region having an impurity concentration less than 3×1019 cm−3.
    • 公开了一种碳化硅MOS半导体器件,其即使当通过以达到良好的欧姆接触所需的高剂量的离子注入形成具有高杂质浓度的表面区域时,也可以相对于击穿电压降低效率百分比。 该器件具有碳化硅半导体衬底,形成在衬底上的第一导电类型的电压阻挡层,形成在电压阻挡层上的第二导电类型的体区,形成在第二导电类型的体接触区 通过选择性离子注入,体区域的表面区域,具有如此高的杂质浓度以产生欧姆接触的体接触区域的表面,在身体区域的表面区域中形成的第一导电类型的源极接触区域由 选择性离子注入,源极接触区域的表面具有如此高的杂质浓度以施加欧姆接触,以及源极延伸区域,其源极延伸区域的杂质浓度低于在源极接触区域下的源极接触区域中的杂质浓度 比源极接触区域的底部区域的尾部通过选择性离子注入,源极延伸区域具有杂质 浓度小于3×1019 cm-3。