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1. 发明授权

US07894202B2 Multilayer capacitor 有权
标题翻译：多层电容器
公开(公告)号：US07894202B2
公开(公告)日：2011-02-22
申请号：US11836601
申请日：2007-08-09
申请人： Hidetaka Fukudome , Masaaki Taniguchi
发明人： Hidetaka Fukudome , Masaaki Taniguchi
IPC分类号： H05K1/18
CPC分类号： H01G4/232 , H01G4/30 , H01L23/50 , H01L2224/16225 , H01L2924/15313 , H01L2924/3011 , H05K1/0231 , H05K1/185 , H05K2201/10712 , Y10T29/435
摘要： A multilayer capacitor includes a laminate of ceramic layers, and a capacitor unit provided in the laminate. In the multilayer capacitor, the relationships P≧Ra and P≧W are established, wherein P represents the average projection height of first and second via conductors from the upper surface, Ra represents the surface roughness of the upper surface, and W represents an amount of curvature of the laminate. Further, the projecting portions of the first and second via conductors projecting from the upper surface are buried in first and second external electrodes, respectively.
摘要翻译：多层电容器包括陶瓷层的层压体和设置在层叠体中的电容器单元。在层叠电容器中，建立了P≥Ra和P≥W的关系，其中P表示第一和第二通孔导体从上表面的平均突出高度，Ra表示上表面的表面粗糙度，W表示的层叠体的曲率。此外，从上表面突出的第一和第二通孔导体的突出部分分别埋在第一和第二外部电极中。

2. 发明授权

US07808770B2 Monolithic ceramic capacitor 有权
标题翻译：单片陶瓷电容器
公开(公告)号：US07808770B2
公开(公告)日：2010-10-05
申请号：US12140341
申请日：2008-06-17
申请人： Hiroto Itamura , Masaaki Taniguchi , Yoshio Kawaguchi
发明人： Hiroto Itamura , Masaaki Taniguchi , Yoshio Kawaguchi
IPC分类号： H01G4/228 , H01G4/005
CPC分类号： H01G4/232 , H01G4/2325
摘要： In an LW-reverse-type monolithic ceramic capacitor including external terminal electrodes each including a resistance component, internal electrodes include nickel or a nickel alloy, and the external terminal electrodes each include a first layer, a second layer provided on the first layer, and a third layer provided on the second layer. The first layer has a wrap-around portion extending from an end surface to principal surfaces and side surfaces of a capacitor main body, and contains a glass component and a compound oxide that reacts with Ni or the Ni alloy. The second layer covers the first layer such that the edge of the wrap-around portion of the first layer remains exposed, and contains a metal. The third layer covers the edge of the wrap-around portion of the first layer and the second layer, and is formed by plating.
摘要翻译：在包括各自包括电阻分量的外部端子电极的LW反向型叠层陶瓷电容器中，内部电极包括镍或镍合金，并且外部端子电极各自包括第一层，设置在第一层上的第二层，以及设置在第二层上的第三层。第一层具有从端面延伸到电容器主体的主表面和侧表面的卷绕部分，并且包含与Ni或Ni合金反应的玻璃成分和复合氧化物。第二层覆盖第一层，使得第一层的环绕部分的边缘保持暴露，并且包含金属。第三层覆盖第一层和第二层的环绕部分的边缘，并且通过电镀形成。

3. 发明申请

US20080037199A1 MULTILAYER CAPACITOR, CIRCUIT BOARD, CIRCUIT MODULE, AND METHOD FOR MANUFACTURING MULTILAYER CAPACITOR 有权
标题翻译：多层电容器，电路板，电路模块和制造多层电容器的方法
公开(公告)号：US20080037199A1
公开(公告)日：2008-02-14
申请号：US11836601
申请日：2007-08-09
申请人： Hidetaka FUKUDOME , Masaaki TANIGUCHI
发明人： Hidetaka FUKUDOME , Masaaki TANIGUCHI
IPC分类号： H01G4/12
CPC分类号： H01G4/232 , H01G4/30 , H01L23/50 , H01L2224/16225 , H01L2924/15313 , H01L2924/3011 , H05K1/0231 , H05K1/185 , H05K2201/10712 , Y10T29/435
摘要： A multilayer capacitor includes a laminate of ceramic layers, and a capacitor unit provided in the laminate. In the multilayer capacitor, the relationships P≧Ra and P≧W are established, wherein P represents the average projection height of first and second via conductors from the upper surface, Ra represents the surface roughness of the upper surface, and W represents an amount of curvature of the laminate. Further, the projecting portions of the first and second via conductors projecting from the upper surface are buried in first and second external electrodes, respectively.
摘要翻译：多层电容器包括陶瓷层的层压体和设置在层叠体中的电容器单元。在层叠电容器中，建立关系P> = Ra和P> = W，其中P表示第一和第二通孔导体从上表面的平均突出高度，Ra表示上表面的表面粗糙度，W表示层叠体的曲率。此外，从上表面突出的第一和第二通孔导体的突出部分分别埋在第一和第二外部电极中。

4. 发明授权

US07006655B2 Methods, apparatus and systems for an electronic watermark having resistance to scaling 有权
公开(公告)号：US07006655B2
公开(公告)日：2006-02-28
申请号：US09952589
申请日：2001-09-11
申请人： Masaaki Taniguchi , Shuhichi Shimizu , Kohichi Kamijoh , Ryoh Sugihara
发明人： Masaaki Taniguchi , Shuhichi Shimizu , Kohichi Kamijoh , Ryoh Sugihara
IPC分类号： H04K1/00
CPC分类号： G06T1/0064 , G06T2201/0061 , H04N1/32352
摘要： The present invention provides methods, apparatus and systems for embedding and detecting an electronic watermark without requiring signals for geometric compensation. A particular embodiment uses a periodic pattern with repetition as an embedded pattern itself, which has information embedded as an electronic watermark, and observes the change of its period upon detection to calculate the scaling factor. When detecting the electronic watermark, the scaling factor of images is calculated from digital data that underwent the scaling processing, and then the processing to detect the electronic watermark is performed based on the obtained scaling factor.

5. 发明申请

US20050067086A1 Method of producing multi-terminal type laminated ceramic electronic component 有权
标题翻译：多端型层叠陶瓷电子元件的制造方法
公开(公告)号：US20050067086A1
公开(公告)日：2005-03-31
申请号：US10896894
申请日：2004-07-23
申请人： Tsuyoshi Ito , Masaaki Taniguchi
发明人： Tsuyoshi Ito , Masaaki Taniguchi
IPC分类号： H01G4/38 , B32B18/00 , H01G4/12 , H01G4/232 , H01G4/30 , C03B29/00
CPC分类号： H01G4/232 , B32B18/00 , C04B2237/32 , C04B2237/68 , H01G4/30
摘要： In a method of producing a multi-terminal type laminated ceramic electronic component in which internal electrodes are embedded in a sintered ceramic member, and the internal electrodes have plural first lead-out electrodes led out to a first side surface and plural second lead-out electrodes led out to a second side surface, the plural second lead-out electrodes of one of the adjacent internal electrodes in each internal electrode pattern are not continuous with the plural first lead-out electrodes of the other of the adjacent internal electrodes, and the plural second lead-out electrodes and the plural first lead-out electrodes are alternately arranged in a direction that is substantially perpendicular to the direction of a line connecting the first and second side surfaces.
摘要翻译：在制造其中内部电极嵌入烧结陶瓷构件的多端子型层叠陶瓷电子部件的方法中，内部电极具有从第一侧面引出的多个第一引出电极和多个第二引出部电极被引出到第二侧表面，每个内部电极图案中的一个相邻内部电极的多个第二引出电极与另一个相邻内部电极的多个第一引出电极不连续，并且多个第二引出电极和多个第一引出电极在大致垂直于连接第一和第二侧表面的线的方向的方向上交替布置。

6. 发明授权

US06794956B2 Circuit substrate having resistive films connecting external terminals in series with lands 有权
标题翻译：电路基板，具有将外部端子串联连接的电阻膜
公开(公告)号：US06794956B2
公开(公告)日：2004-09-21
申请号：US10223629
申请日：2002-08-20
申请人： Masaaki Taniguchi , Hidekazu Kitamura
发明人： Masaaki Taniguchi , Hidekazu Kitamura
IPC分类号： H03H700
CPC分类号： H01L27/016 , H05K1/023 , H05K1/0231 , H05K1/025 , H05K1/167 , H05K3/245 , H05K3/321 , H05K2201/035 , H05K2201/10636 , H05K2201/10992 , Y02P70/611
摘要： A circuit substrate includes resistive films are disposed on the surfaces of lands included in a circuit pattern and these resistive films are used as resistances connected in series to a capacitor. Therefore, the resistances are connected in series without increasing the inductance in the capacitor, and accordingly, a circuit having a small impedance variation with respect to frequency can be obtained. Therefore, it is possible to obtain a power supply circuit and so forth having stable operation and fast response.
摘要翻译：电路基板包括电阻膜设置在包括在电路图案中的焊盘的表面上，并且这些电阻膜用作串联连接到电容器的电阻。因此，电阻串联连接而不增加电容器中的电感，因此可以获得相对于频率具有小的阻抗变化的电路。因此，可以获得稳定运行和快速响应的电源电路等。

7. 发明授权

US06462932B1 Multilayer Capacitor 有权
标题翻译：多层电容器
公开(公告)号：US06462932B1
公开(公告)日：2002-10-08
申请号：US09517971
申请日：2000-03-03
申请人： Yasuyuki Naito , Masaaki Taniguchi , Yoichi Kuroda , Takanori Kondo
发明人： Yasuyuki Naito , Masaaki Taniguchi , Yoichi Kuroda , Takanori Kondo
IPC分类号： H01G4228
CPC分类号： H01G4/30
摘要： First and second external terminal electrodes are formed on the same principal surface of a capacitor main body. The connection between first internal electrodes in the capacitor main body, the first external terminal electrode and the mutual connection between the plurality of first internal electrodes is achieved by a first connection portion. The connection between second internal electrodes, the second external terminal electrode and the mutual connection between the plurality of second internal electrodes is achieved by a second connection portion. The first and second connection portions are arranged alternately. Currents flow through the connection portions in opposite directions with the result that components of magnetic flux generated by such currents are cancelled and the ESL is reduced.
摘要翻译：第一和第二外部端子电极形成在电容器主体的相同主表面上。电容器主体中的第一内部电极，第一外部端子电极与多个第一内部电极之间的相互连接之间的连接由第一连接部分实现。通过第二连接部分实现第二内部电极，第二外部端子电极与多个第二内部电极之间的相互连接。第一连接部和第二连接部交替配置。电流在相反方向流过连接部分，结果是由这种电流产生的磁通量的分量被消除并且ESL减小。

8. 发明授权

US06351369B1 Multi-layer capacitor, wiring substrate, decoupling circuit, and high-frequency circuit 有权
标题翻译：多层电容器，布线基板，去耦电路和高频电路
公开(公告)号：US06351369B1
公开(公告)日：2002-02-26
申请号：US09514516
申请日：2000-02-28
申请人： Yoichi Kuroda , Masaaki Taniguchi , Yasuyuki Naito , Haruo Hori , Takanori Kondo
发明人： Yoichi Kuroda , Masaaki Taniguchi , Yasuyuki Naito , Haruo Hori , Takanori Kondo
IPC分类号： H01G4228
CPC分类号： H01G4/232 , H01G4/30 , H01L23/642 , H01L2924/0002 , H05K1/0231 , H05K2201/10515 , H05K2201/10734 , H01L2924/00
摘要： A multi-layer capacitor achieves significant reduction in equivalent series inductance (ESL) and includes first inner electrodes and second inner electrodes opposing each other, first feed-through conductors and second feed-through conductors, and first outer terminal electrodes and second outer terminal electrodes. The first feed-through conductors electrically connect the first inner electrodes and the first outer terminal electrodes, and the second feed-through conductors electrically connect the second inner electrodes and the second outer terminal electrodes. The first and second feed-through conductors are arranged such that the feed-through conductors mutually cancel magnetic fields induced by current flowing through the first and second inner electrodes. Furthermore, when an alignment pitch of the first and second feed-through conductors is indicated by P and the total number of the first and second feed-through conductors is indicated by N, an arrangement is set such that a ratio of P/N is about 0.085 mm or lower.
摘要翻译：多层电容器实现了等效串联电感（ESL）的显着降低，并且包括彼此相对的第一内部电极和第二内部电极，第一馈通导体和第二馈通导体以及第一外部末端电极和第二外部末端电极。第一馈通导体电连接第一内电极和第一外端子电极，第二馈通导体电连接第二内电极和第二外端子电极。第一和第二馈通导体布置成使得馈通导体相互抵消由流过第一和第二内部电极的电流感应的磁场。此外，当第一和第二馈通导体的对准间距由P表示，并且第一和第二馈通导体的总数由N表示时，设置P / N的比率为约0.085mm以下。

9. 发明授权

US5644840A Method of producing a plate-type heat exchanger 失效
标题翻译：板式热交换器的制造方法
公开(公告)号：US5644840A
公开(公告)日：1997-07-08
申请号：US422171
申请日：1995-04-14
申请人： Youichi Hisamori , Mitunori Kurachi , Masaaki Taniguchi , Tutomu Noma , Masao Kohashi , Yoshihiro Sumida
发明人： Youichi Hisamori , Mitunori Kurachi , Masaaki Taniguchi , Tutomu Noma , Masao Kohashi , Yoshihiro Sumida
IPC分类号： F28D9/00 , F28F3/08 , F28F3/12 , F28F9/04 , F28F9/26 , F28F19/00 , F28F21/08 , B23P15/26
CPC分类号： F28D9/0075 , F28D9/005 , F28F19/004 , F28F21/082 , F28F21/085 , F28F9/0246 , Y10S165/905 , Y10T29/49373 , Y10T29/49393
摘要： To eliminate a fear of electrolytic corrosion even in the case where a heat exchanger to be connected to the outside of the plate-type heat exchanger has a copper piping, and to prevent any damage from being given to the brazed portions of the plate-type heat exchanger at the time of joining pipes and to prevent faults from being generated in joined portions. An intermediate pipe made of a material in which the value of polarization potential becomes lower than that generated between a body of the plate-type heat exchanger and the copper piping is interposed between the plate-type heat exchanger body and the copper piping. Further, the plate-type heat exchanger body is disposed in a position out of a vertical line of a joined portion between the copper piping and the intermediate pipe. Further, a joint constituted by an intermediate pipe and a copper pipe joined in advance through brazing or welding at a temperature higher than a temperature of brazing of the plate-type heat exchanger body is brazed at the same time of brazing of the plate-type heat exchanger body under the condition that the joint is arranged so that the intermediate pipe side of the joint is joined with the end plate of the heat exchanger body.
摘要翻译：为了消除电解腐蚀的恐惧，即使在与板式热交换器的外部连接的热交换器具有铜管道的情况下，并且为了防止对板式热交换器的钎焊部分造成任何损坏在连接管道时的热交换器，并且防止在接合部分中产生故障。由板式热交换器主体和铜管之间插入由极板电位值低于板式热交换器的主体与铜管之间的极化电位值的材料构成的中间管。此外，板式热交换器体设置在铜管和中间管之间的接合部的垂直线以外的位置。此外，在板式热交换器主体的钎焊温度以上的温度下通过钎焊或焊接预先接合的中间管和铜管构成的接头在与板式热交换器的钎焊同时进行钎焊热交换器主体在接头被布置成使得接头的中间管侧与热交换器主体的端板接合的条件下进行。

10. 发明授权

US08185908B2 Dynamic scheduling in a distributed environment 有权
标题翻译：分布式环境中的动态调度
公开(公告)号：US08185908B2
公开(公告)日：2012-05-22
申请号：US12173387
申请日：2008-07-15
申请人： Masaaki Taniguchi , Harunobu Kubo
发明人： Masaaki Taniguchi , Harunobu Kubo
IPC分类号： G06F9/46 , G06F15/173 , G06F15/177
CPC分类号： G06F9/5038 , G06F9/5083 , G06F2209/5021
摘要： A method and system is provided for assigning programs in a workflow to one or more nodes for execution. Prior to the assignment, a priority of execution of each program is calculated in relation to its dependency upon data received and transmitted data. Based upon the calculated priority and the state of each of the nodes, the programs in the workflow are dynamically assigned to one or more nodes for execution. In addition to the node assignment based upon priority, preemptive execution of the programs in the workflow is determined so that the programs in the workflow may not preemptively be executed at a selected node in response to the determination.
摘要翻译：提供了一种方法和系统，用于将工作流中的程序分配给一个或多个节点用于执行。在分配之前，根据对接收到的数据和发送的数据的依赖性来计算每个程序的执行优先级。基于计算的优先级和每个节点的状态，将工作流中的程序动态分配给一个或多个节点进行执行。除了基于优先级的节点分配之外，确定工作流中的程序的先发执行，使得响应于该确定，工作流中的程序可以不被抢先地在所选节点执行。

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