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1. 发明授权

US07293125B2 Dynamic reconfiguration of PCI express links 有权
公开(公告)号：US07293125B2
公开(公告)日：2007-11-06
申请号：US11468222
申请日：2006-08-29
申请人： Martin McAfee , Louis N. Castro
发明人： Martin McAfee , Louis N. Castro
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. During operation of the computer system, the status of the endpoints is detected and unused links (or unused portions of links) are rerouted to other endpoints.

2. 发明授权

US07480831B2 Method and apparatus for recovering from a failed I/O controller in an information handling system 有权
标题翻译：用于在信息处理系统中从故障I / O控制器恢复的方法和装置
公开(公告)号：US07480831B2
公开(公告)日：2009-01-20
申请号：US10349584
申请日：2003-01-23
申请人： Martin McAfee , Bharath Vasudevan
发明人： Martin McAfee , Bharath Vasudevan
IPC分类号： G09F11/00
CPC分类号： G06F11/2017
摘要： An information handling system includes first and second I/O controllers, a detector for detecting an I/O controller failure, and an I/O recovery unit. The first I/O controller adaptively controls a first and a second I/O slot. The second I/O controller adaptively controls a third and a fourth I/O slot. Lastly, the I/O recovery unit, responsive to a detected I/O controller failure, operatively couples/decouples the first and second I/O slot to/from the first I/O controller, operatively couples/decouples the third and fourth I/O slot to/from the second I/O controller, and operatively decouples/couples the first and second I/O slot from/to the third and fourth I/O slot according to an I/O failure recovery protocol, the I/O failure recovery protocol provided for adapting one of either the first and second I/O controllers to operatively couple to the first, second, third and fourth I/O slots as a function of the detected I/O controller failure.
摘要翻译：信息处理系统包括第一和第二I / O控制器，用于检测I / O控制器故障的检测器和I / O恢复单元。第一个I / O控制器自适应地控制第一和第二I / O插槽。第二个I / O控制器自适应地控制第三个和第四个I / O插槽。最后，响应于检测到的I / O控制器故障的I / O恢复单元可操作地将第一和第二I / O槽与第一I / O控制器耦合/去耦，可操作地将第三和第四I / O插槽连接到/来自第二I / O控制器，并且根据I / O故障恢复协议，可操作地将第一和第二I / O插槽与第三I / O插槽耦合到第三和第四I / O插槽，I / O故障恢复协议，用于根据检测到的I / O控制器故障来适配第一和第二I / O控制器之一以可操作地耦合到第一，第二，第三和第四I / O时隙。

3. 发明授权

US07149907B2 Multi-processor system recovery using THERMTRIP signal 有权
标题翻译：使用THERMTRIP信号的多处理器系统恢复
公开(公告)号：US07149907B2
公开(公告)日：2006-12-12
申请号：US10616835
申请日：2003-07-10
申请人： Martin McAfee , Kevin L. Miller , Robert L. Nance , Robert S. Tung
发明人： Martin McAfee , Kevin L. Miller , Robert L. Nance , Robert S. Tung
IPC分类号： G06F1/26
CPC分类号： G06F11/3006 , G06F1/206 , G06F1/24 , G06F11/00 , G06F11/0724 , G06F11/0793 , G06F11/3024 , G06F11/3058
摘要： A method of responding to a thermal trip signal generated by a processor of a system having multiple processor nodes. If a processor overheats beyond a critical temperature, a temperature monitor receives the thermal trip signal, and turns off an enable signal to a voltage control module that control power to the processors. The temperature monitor also triggers a system reset. Upon reset, the temperature monitor ensures that all nodes, other than the node with the overheated processor, return to an operational state.
摘要翻译：一种响应由具有多个处理器节点的系统的处理器产生的热跳闸信号的方法。如果处理器过热超过临界温度，则温度监视器接收热跳闸信号，并且关闭控制对处理器供电的电压控制模块的使能信号。温度监控器还触发系统复位。复位后，温度监控器可确保除具有过热处理器的节点以外的所有节点返回到运行状态。

4. 发明申请

US20050010827A1 Multi-processor system recovery using thermtrip signal 有权
标题翻译：使用热带信号的多处理器系统恢复
公开(公告)号：US20050010827A1
公开(公告)日：2005-01-13
申请号：US10616835
申请日：2003-07-10
申请人： Martin McAfee , Kevin Miller , Robert Nance , Robert Tung
发明人： Martin McAfee , Kevin Miller , Robert Nance , Robert Tung
IPC分类号： G06F1/20 , G06F1/24 , G06F11/00 , G06F11/07 , G06F11/30 , G06F1/26
CPC分类号： G06F11/3006 , G06F1/206 , G06F1/24 , G06F11/00 , G06F11/0724 , G06F11/0793 , G06F11/3024 , G06F11/3058
摘要： A method of responding to a thermal trip signal generated by a processor of a system having multiple processor nodes. If a processor overheats beyond a critical temperature, a temperature monitor receives the thermal trip signal, and turns off an enable signal to a voltage control module that control power to the processors. The temperature monitor also triggers a system reset. Upon reset, the temperature monitor ensures that all nodes, other than the node with the overheated processor, return to an operational state.
摘要翻译：一种响应由具有多个处理器节点的系统的处理器产生的热跳闸信号的方法。如果处理器过热超过临界温度，则温度监视器接收热跳闸信号，并且关闭控制对处理器供电的电压控制模块的使能信号。温度监控器还触发系统复位。复位后，温度监控器可确保除具有过热处理器的节点以外的所有节点返回到运行状态。

5. 发明申请

US20090037776A1 Recovering From A Failed I/O Controller In An Information Handling System 有权
标题翻译：在信息处理系统中从I / O控制器故障中恢复
公开(公告)号：US20090037776A1
公开(公告)日：2009-02-05
申请号：US12250847
申请日：2008-10-14
申请人： Martin McAfee , Bharath Vasudevan
发明人： Martin McAfee , Bharath Vasudevan
IPC分类号： G06F11/00
CPC分类号： G06F11/2017
摘要： An information handling system includes first and second input/output (I/O) controllers, a detector for detecting an I/O controller failure, and an I/O recovery unit. The first I/O controller adaptively controls a first and a second I/O slot. The second I/O controller adaptively controls a third and a fourth I/O slot. Lastly, the I/O recovery unit, responsive to a detected I/O controller failure, operatively couples/decouples the first and second I/O slot to/from the first I/O controller, operatively couples/decouples the third and fourth I/O slot to/from the second I/O controller, and operatively decouples/couples the first and second I/O slot from/to the third and fourth I/O slot according to an I/O failure recovery protocol, the I/O failure recovery protocol provided for adapting one of either the first and second I/O controllers to operatively couple to the first, second, third and fourth I/O slots as a function of the detected I/O controller failure.
摘要翻译：信息处理系统包括第一和第二输入/输出（I / O）控制器，用于检测I / O控制器故障的检测器和I / O恢复单元。第一个I / O控制器自适应地控制第一和第二I / O插槽。第二个I / O控制器自适应地控制第三个和第四个I / O插槽。最后，响应于检测到的I / O控制器故障的I / O恢复单元可操作地将第一和第二I / O槽与第一I / O控制器耦合/去耦，可操作地将第三和第四I / O插槽连接到/来自第二I / O控制器，并且根据I / O故障恢复协议，可操作地将第一和第二I / O插槽与第三I / O插槽耦合到第三和第四I / O插槽，I / O故障恢复协议，用于根据检测到的I / O控制器故障来适配第一和第二I / O控制器之一以可操作地耦合到第一，第二，第三和第四I / O时隙。

6. 发明申请

US20070073959A1 Dynamic reconfiguration of PCI express links 有权
标题翻译： PCI Express链路的动态重配置
公开(公告)号：US20070073959A1
公开(公告)日：2007-03-29
申请号：US11468222
申请日：2006-08-29
申请人： Martin McAfee , Louis Castro
发明人： Martin McAfee , Louis Castro
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. During operation of the computer system, the status of the endpoints is detected and unused links (or unused portions of links) are rerouted to other endpoints.
摘要翻译：一种用于动态重新配置PCI Express总线的链路的方法和电路。最初使用PCI Express标准的缩放功能，首先使用PCI Express总线链接到各种端点的计算机系统。在计算机系统的操作期间，检测端点的状态，并且将未使用的链路（或未使用的链路部分）重新路由到其他端点。

7. 发明授权

US07600157B2 Recovering from a failed I/O controller in an information handling system 有权
标题翻译：从信息处理系统中的故障I / O控制器恢复
公开(公告)号：US07600157B2
公开(公告)日：2009-10-06
申请号：US12250847
申请日：2008-10-14
申请人： Martin McAfee , Bharath Vasudevan
发明人： Martin McAfee , Bharath Vasudevan
IPC分类号： G06F11/00
CPC分类号： G06F11/2017
摘要： An information handling system includes first and second input/output (I/O) controllers, a detector for detecting an I/O controller failure, and an I/O recovery unit. The first I/O controller adaptively controls a first and a second I/O slot. The second I/O controller adaptively controls a third and a fourth I/O slot. Lastly, the I/O recovery unit, responsive to a detected I/O controller failure, operatively couples/decouples the first and second I/O slot to/from the first I/O controller, operatively couples/decouples the third and fourth I/O slot to/from the second I/O controller, and operatively decouples/couples the first and second I/O slot from/to the third and fourth I/O slot according to an I/O failure recovery protocol, the I/O failure recovery protocol provided for adapting one of either the first and second I/O controllers to operatively couple to the first, second, third and fourth I/O slots as a function of the detected I/O controller failure.
摘要翻译：信息处理系统包括第一和第二输入/输出（I / O）控制器，用于检测I / O控制器故障的检测器和I / O恢复单元。第一个I / O控制器自适应地控制第一和第二I / O插槽。第二个I / O控制器自适应地控制第三个和第四个I / O插槽。最后，响应于检测到的I / O控制器故障的I / O恢复单元可操作地将第一和第二I / O槽与第一I / O控制器耦合/去耦，可操作地将第三和第四I / O插槽连接到/来自第二I / O控制器，并且根据I / O故障恢复协议，可操作地将第一和第二I / O插槽与第三I / O插槽耦合到第三和第四I / O插槽，I / O故障恢复协议，用于根据检测到的I / O控制器故障来适配第一和第二I / O控制器之一以可操作地耦合到第一，第二，第三和第四I / O时隙。

8. 发明授权

US07099969B2 Dynamic reconfiguration of PCI Express links 有权
标题翻译： PCI Express链路的动态重新配置
公开(公告)号：US07099969B2
公开(公告)日：2006-08-29
申请号：US10702832
申请日：2003-11-06
申请人： Martin McAfee , Louis N. Castro
发明人： Martin McAfee , Louis N. Castro
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. During operation of the computer system, the status of the endpoints is detected and unused links (or unused portions of links) are rerouted to other endpoints.
摘要翻译：一种用于动态重新配置PCI Express总线链路的方法和电路。最初使用PCI Express标准的缩放功能，首先使用PCI Express总线链接到各种端点的计算机系统。在计算机系统的操作期间，检测端点的状态，并且将未使用的链路（或未使用的链路部分）重新路由到其他端点。

9. 发明申请

US20050102454A1 Dynamic reconfiguration of PCI express links 有权
标题翻译： PCI Express链路的动态重配置
公开(公告)号：US20050102454A1
公开(公告)日：2005-05-12
申请号：US10702832
申请日：2003-11-06
申请人： Martin McAfee , Louis Castro
发明人： Martin McAfee , Louis Castro
IPC分类号： G06F13/14 , G06F13/36 , G06F13/40 , G06F13/00
CPC分类号： G06F13/4022
摘要： A method and circuitry for dynamically reconfiguring the links of a PCI Express bus. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. During operation of the computer system, the status of the endpoints is detected and unused links (or unused portions of links) are rerouted to other endpoints.
摘要翻译：一种用于动态重新配置PCI Express总线链路的方法和电路。最初使用PCI Express标准的缩放功能，首先使用PCI Express总线链接到各种端点的计算机系统。在计算机系统的操作期间，检测端点的状态，并且将未使用的链路（或未使用的链路部分）重新路由到其他端点。

10. 发明授权

US06865693B1 System and method for debugging multiprocessor systems 有权
标题翻译：用于调试多处理器系统的系统和方法
公开(公告)号：US06865693B1
公开(公告)日：2005-03-08
申请号：US09692647
申请日：2000-10-19
申请人： Martin McAfee
发明人： Martin McAfee
IPC分类号： G01R31/317 , G06F11/00 , G06F11/22
CPC分类号： G01R31/31705 , G06F11/2247
摘要： A debugging circuit capable of debugging a plurality of possible microprocessors, and a switch for use in the same. The debugging circuit includes a debugging port, a plurality of microprocessor sockets each adapted to receive a microprocessor, and a plurality of switches corresponding to a respective microprocessor socket. The plurality of microprocessor sockets are adapted to form a serial signal path, and each of the switches is capable of automatically detecting whether a microprocessor is present in the corresponding microprocessor socket. If a microprocessor is present, the switch is automatically configured to include the microprocessor within the signal path, and if the microprocessor is not present, the switch is automatically configured so that the signal path bypasses that microprocessor socket.
摘要翻译：能够调试多个可能的微处理器的调试电路和用于其中的开关。调试电路包括调试端口，各自适于接收微处理器的多个微处理器插座和对应于相应的微处理器插座的多个开关。多个微处理器插槽适于形成串行信号路径，并且每个开关能够自动检测微处理器是否存在于相应的微处理器插座中。如果存在微处理器，则开关自动配置为将微处理器包括在信号路径内，如果微处理器不存在，则自动配置开关，以使信号路径绕过该微处理器插座。

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