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    • 1. 发明授权
    • Phase lock loop and improved phase detector therefor
    • 锁相环和改进的相位检测器
    • US4879527A
    • 1989-11-07
    • US301527
    • 1989-01-23
    • Michael GeileMark DapperTerrance Hill
    • Michael GeileMark DapperTerrance Hill
    • H03L7/087
    • H03L7/087
    • A voltage controlled oscillator of a phase lock loop responds to a phase error signal having a value commensurate with the phase difference between input and output signals of the loop, wherein the phase difference extends over more than a one cycle difference of the loop input and output signals. The phase error signal is derived by mixing the loop input and output signals to derive a pair of signals having amplitudes representing orthogonal components of the difference frequency of the loop input and output signals. In response to the signals representing the orthogonal components, signals are derived indicative of the whole number cycle difference of the input and output signals, fractional cycle difference of the input and output signals, and a combination of the amplitudes of the signals representing the whole number cycle difference and the fractional cycle difference of the input and output signals. The latter combination indicates the amplitude of the arc whose tangent is the ratio of the input and output signals even though the loop input and output frequencies differ.
    • 锁相环的压控振荡器响应于具有与循环的输入和输出信号之间的相位差相当的值的相位误差信号,其中相位差超过环路输入和输出的多于一个周期的差 信号。 通过混合环路输入和输出信号来导出相位误差信号,以导出具有表示环路输入和输出信号的差频的正交分量的振幅的一对信号。 响应于表示正交分量的信号,导出指示输入和输出信号的整数周期差的信号,输入和输出信号的分数周期差,以及表示整数的信号的幅度的组合 周期差和输入和输出信号的分数周期差。 后一种组合表示即使环路输入和输出频率不同,其切线也是输入和输出信号的比率的电弧幅度。
    • 8. 发明授权
    • Apparatus for and method of synchronizing a local oscillator to a
received digital bit stream
    • 本地振荡器与接收的数字位流同步的装置和方法
    • US5073905A
    • 1991-12-17
    • US396876
    • 1989-08-22
    • Mark DapperTerrance Hill
    • Mark DapperTerrance Hill
    • H04L7/033
    • H04L7/0331
    • An output of a local oscillator is synchronized to received bits of a digital bit stream by sampling the binary value of each of the received bits several times during each of the received bits, to derive for each received bit a several bit binary word representing the sampled values. A memory is addressed in response to the binary value of the several bit binary word to control the local oscillator synchronization. The synchronized local oscillator controls the sampling times of the plural samples of each of the received bits so that the binary value of the word controls the oscillator synchronization and the sampling times. The addressed word in the memory determines the value of the received bit, controls the oscillator synchronization, and provides indications of sync lock and unit content of each received data bit.
    • 在每个接收到的比特期间,本地振荡器的输出与数字比特流的接收比特同步到多个接收比特中的每一个的二进制数值,以便为每个接收的比特导出表示采样的几位二进制字 价值观。 响应于几位二进制字的二进制值来寻址存储器以控制本地振荡器同步。 同步本地振荡器控制每个接收位的多个采样的采样时间,使得字的二进制值控制振荡器同步和采样时间。 存储器中的寻址字确定接收位的值,控制振荡器同步,并提供每个接收数据位的同步锁定和单位内容的指示。