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    • 1. 发明授权
    • Control apparatus and control method
    • 控制装置及控制方法
    • US08713382B2
    • 2014-04-29
    • US13213054
    • 2011-08-18
    • Makoto Tabata
    • Makoto Tabata
    • G11C29/00
    • G11C29/56G11C29/56008G11C29/808G11C29/81
    • A control apparatus controlling testing of a memory under test that includes one or more row repair memory blocks and column repair memory blocks. The control apparatus comprises a counting section that sequentially receives test results respectively indicating pass/fail of a plurality of test blocks of the memory under test, and sequentially counts, for each first-type memory block, which is a row-oriented memory block or a column-oriented memory block, a fail memory block number among second-type memory blocks; a selecting section that selects memory blocks first-type memory blocks for which the fail memory block number exceeds a reference value, such that the number of selected memory blocks is no greater than the number of first-type repair memory blocks of the memory under test; and a test control section that masks test blocks among the memory blocks selected by the selecting section and causes further testing of the memory under test.
    • 控制装置,其控制包括一个或多个行修复存储器块和列修复存储器块的被测存储器的测试。 该控制装置包括计数部分,其依次接收分别指示被测存储器的多个测试块的通过/失败的测试结果,并且对于作为面向行的存储器块的每个第一类型存储器块, 一个面向列的存储器块,第二类型存储器块中的故障存储器块号; 选择部,其选择存储块,其中所述故障存储器块号超过参考值的第一类型存储块,使得所选存储块的数量不大于被测存储器的第一类型修复存储块的数量 ; 以及测试控制部分,其对由所述选择部分选择的所述存储器块中的测试块进行掩蔽,并且对被测试的存储器进行进一步测试。
    • 3. 发明授权
    • Test apparatus that tests a device under test having a test function for sequentially outputting signals
    • 测试被测设备具有用于顺序地输出信号的测试功能的测试装置
    • US08072232B2
    • 2011-12-06
    • US12618619
    • 2009-11-13
    • Makoto Tabata
    • Makoto Tabata
    • G01R31/26
    • G11C29/56G11C29/48G11C2029/5602G11C2029/5606
    • Provided is a test apparatus that tests a device under test having a test function for sequentially outputting, from a single test terminal, signals that would be output from a plurality of terminals, the test apparatus comprising: a test section that supplies the device under test with a test signal and receives signals that are sequentially output from the test terminal in response to the test signal; an identifying section that identifies a correspondence between each signal sequentially received by the test section and a signal that would be output from one of the terminals of the device under test; and a counting section that counts a number of signals judged to be unacceptable from among the signals sequentially received by the test section for each terminal of the device under test, based on the correspondence identified by the identifying section.
    • 提供了一种测试装置,其具有测试功能,用于从单个测试终端顺次地输出将从多个终端输出的信号,所述测试设备包括:测试部分,其供应被测设备 具有测试信号并接收响应于测试信号从测试终端顺序地输出的信号; 标识部分,其识别由测试部分顺序接收的每个信号与将从被测设备的一个终端输出的信号之间的对应关系; 以及计数部,其基于由识别部识别的对应关系,对从被测设备的每个终端按测试部分顺序接收的信号中判定为不可接受的信号数进行计数。
    • 4. 发明申请
    • MOBILE COMMUNICATION APPARATUS AND ANTENNA STRUCTURE
    • 移动通信装置和天线结构
    • US20100255893A1
    • 2010-10-07
    • US12693616
    • 2010-01-26
    • Akio IharaMinoru SakuraiMakoto Tabata
    • Akio IharaMinoru SakuraiMakoto Tabata
    • H04W88/02H01Q1/24
    • H01Q1/243H01Q21/28H04W88/02
    • A mobile communication apparatus configured to be provided with an extra antenna has a printed board provided with an antenna feed point, an antenna having a spring-like contact and provided on the printed board, and a housing constituted by a first case and a second case fixed into each other. The printed board and the antenna are arranged between and pressed by the first case and the second case. The antenna feed point and the spring-like contact are in contact with and electrically connected to each other by means of elastic force of the spring-like contact caused upon the first case and the second case being fixed into each other. The housing has a space for containing the extra antenna such that the extra antenna is electrically connected to the antenna feed point by means of the elastic force.
    • 配置成设置有额外天线的移动通信装置具有设置有天线馈电点的印刷电路板,具有弹簧状接触并设置在印刷电路板上的天线以及由第一壳体和第二壳体构成的壳体 相互固定 印刷电路板和天线布置在第一壳体和第二壳体之间并被第一壳体和第二壳体按压之间。 天线馈电点和弹簧状触点通过在第一壳体上引起的弹簧状接触的弹力彼此接触并彼此电连接,并且第二壳体彼此固定。 壳体具有用于容纳额外天线的空间,使得额外的天线通过弹性力电连接到天线馈电点。
    • 5. 发明申请
    • TEST APPARATUS
    • 测试仪器
    • US20100148815A1
    • 2010-06-17
    • US12618619
    • 2009-11-13
    • Makoto TABATA
    • Makoto TABATA
    • G01R31/02
    • G11C29/56G11C29/48G11C2029/5602G11C2029/5606
    • Provided is a test apparatus that tests a device under test having a test function for sequentially outputting, from a single test terminal, signals that would be output from a plurality of terminals, the test apparatus comprising: a test section that supplies the device under test with a test signal and receives signals that are sequentially output from the test terminal in response to the test signal; an identifying section that identifies a correspondence between each signal sequentially received by the test section and a signal that would be output from one of the terminals of the device under test; and a counting section that counts a number of signals judged to be unacceptable from among the signals sequentially received by the test section for each terminal of the device under test, based on the correspondence identified by the identifying section.
    • 提供了一种测试装置,其具有测试功能,用于从单个测试终端顺序地输出将从多个终端输出的信号,该测试装置包括:供给被测设备的测试部分 具有测试信号并接收响应于测试信号从测试终端顺序地输出的信号; 标识部分,其识别由测试部分顺序接收的每个信号与将从被测设备的一个终端输出的信号之间的对应关系; 以及计数部,其基于由识别部识别的对应关系,对从被测设备的每个终端按测试部分顺序接收的信号中判定为不可接受的信号数进行计数。
    • 8. 发明申请
    • Semiconductor tester and testing method of semiconductor memory
    • 半导体测试仪和半导体存储器的测试方法
    • US20100008170A1
    • 2010-01-14
    • US11919585
    • 2007-04-20
    • Shinya SatoMakoto Tabata
    • Shinya SatoMakoto Tabata
    • G11C29/00G06F19/00
    • G11C29/56G11C29/56004
    • The disclosure concerns a semiconductor tester for testing a memory under test. The semiconductor tester comprises a pattern generator generating address information on the pages and generating a test pattern; a waveform shaper shaping the test pattern and outputting a test signal based on the shaped test pattern to the memory cells in the page identified by the address information; a comparator comparing a result signal output from the memory under test receiving the test signal with an expectation value; and a bad block memory storing information on a bad block in the memory under test in advance, when the page identified by the address information is included in the bad block, the bad block memory outputting a bad signal used to skip from the address information on the page included in the bad block to the address information on the page included in a next block under test.
    • 本公开涉及用于测试被测存储器的半导体测试器。 半导体测试器包括在页面上产生地址信息并生成测试图案的模式发生器; 波形整形器整形所述测试图案,并且将基于所述成形测试图案的测试信号输出到由所述地址信息标识的所述页面中的所述存储器单元; 比较将来自被测存储器的结果信号接收测试信号与期望值进行比较的比较器; 以及坏块存储器,其中,当由所述地址信息识别的页面被包括在所述坏块中时,预先存储有被测试存储器中的坏块的信息,所述坏块存储器输出用于从所述地址信息跳过的坏信号 包含在坏块中的页面包含在下一个被测试块中的页面上的地址信息。