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    • 1. 发明授权
    • Switching unit for the transfer of digitized signals in PCM system
    • 用于PCM系统中数字化信号传输的切换单元
    • US4545051A
    • 1985-10-01
    • US478467
    • 1983-03-24
    • Piero BelforteBruno BosticaLuciano PilatiAmilcare BovoLuigi Canato
    • Piero BelforteBruno BosticaLuciano PilatiAmilcare BovoLuigi Canato
    • H04Q3/52H04Q11/04H04Q11/00H04J3/02
    • H04Q11/04
    • A switching unit for the selective transfer of bytes concurrently arriving in successive time slots over eight incoming signal paths to as many outgoing signal paths with intervening temporal and/or spatial transposition comprises a byte memory, loaded by way of a series/parallel converter and read out by way of a parallel/series converter, under the control of a routing memory dialoguing via a logic network with a microprocessor. The latter, through instructions sent to the logic network, may command the blocking of the readout from the byte memory onto an outgoing path during a given time slot, the insertion of a particular byte into such a time slot, or the transfer of selected bytes from either memory to the microprocessor itself. In particular, bytes from the first time slots of PCM frames arriving over selected signal paths can be so extracted from diagnostic purposes.
    • 用于选择性地传送八个输入信号路径到达连续时隙的字节的切换单元,其具有间隔时间和/或空间转置的尽可能多的输出信号路径,包括通过串/并转换器加载的字节存储器 通过并行/串联转换器,在通过与微处理器的逻辑网络对话的路由存储器的控制下。 后者通过发送到逻辑网络的指令可以在给定时隙期间命令将字节存储器中的读出阻塞到输出路径上,将特定字节插入到这样的时隙中,或者将所选字节的传送 从任何一个存储器到微处理器本身。 特别地,从诊断目的可以提取从所选信号路径到达的PCM帧的第一时隙的字节。
    • 3. 发明授权
    • PCM Switching network with surplus capacity
    • 具有过剩容量的PCM交换网络
    • US4536870A
    • 1985-08-20
    • US528535
    • 1983-09-01
    • Amilcare BovoLuigi Canato
    • Amilcare BovoLuigi Canato
    • H04Q11/04H04J1/16H04J3/14
    • H04Q11/04
    • A network for selectively switching channels from n incoming PCM links to as many outgoing PCM links comprises two sections of a receiving-side stage with n input terminals each, connected in parallel to respective incoming links, and with m output terminals working into an intermediate stage with 2m input terminals and as many output terminals. The latter are connected to respective input terminals of two sections of a transmitting-side stage with n output terminals each; homologous output terminals of the two transmitting-side sections are alternatively connectable to respective channels of n outgoing PCM links by means of multiplexers which are switched by a logic unit under the control of a processor also detecting possible malfunctions in any section. Each stage consists of a multiplicity of temporal or spatial switching matrices. With m lying between n/2 and n, and with all matrices operating normally, the logic unit routes about half the incoming channels through each receiving-side section and each transmitting-side section; the matrices of the intermediate stage provide a plurality of alternate paths between any receiving-side matrix and any transmitting-side matrix. When a receiving-side or transmitting side matrix fails, the routes established therethrough are transferred to its counterpart in the other section of the respective stage; failure of an intermediate matrix results in a redistribution of its routes through the remaining matrices of this stage.
    • 用于选择性地将信道从n个PCM链路切换到尽可能多的输出PCM链路的网络包括具有n个输入端子的接收侧级的两个部分,并行连接到相应的进入链路,并且m个输出端子工作到中间阶段 具有2m输入端子和多个输出端子。 后者连接到发送侧级的两个部分的相应输入端,每个具有n个输出端; 两个发送侧部分​​的同源输出端可替换地通过多路复用器连接到n个输出PCM链路的各个信道,多路复用器在处理器的控制下由逻辑单元切换,同时也检测任何部分中的可能的故障。 每个阶段由多个时间或空间切换矩阵组成。 当m位于n / 2和n之间,并且所有矩阵正常工作时,逻辑单元通过每个接收侧部分和每个发送侧部分​​路由约一半的入局信道; 中间级的矩阵在任何接收侧矩阵和任何发射侧矩阵之间提供多个替代路径。 当接收侧或发送侧矩阵发生故障时,通过其建立的路由被转移到相应级的另一部分中的对应物; 中间矩阵的失败导致其路线通过该阶段的剩余矩阵的再分配。