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    • 2. 发明授权
    • Optimized multi-mode DFT implementation
    • 优化多模DFT实现
    • US08010588B2
    • 2011-08-30
    • US11819510
    • 2007-06-27
    • Yuhuan XuLudwig Schwoerer
    • Yuhuan XuLudwig Schwoerer
    • G06F17/14
    • G06F17/142H04L27/263H04L27/265
    • The present invention relates to a method and apparatus for implementing a discrete Fourier transformation (DFT) of a predetermined vector size, wherein at least one enhanced DFT module is provided by using at least one type of DFT module including multiplication by first and second types of twiddle factors in respective different multiplication stages separated by an intermediate integration stage, and generating the enhanced DFT module by combining the at least one type of DFT module with a recursive stage configured to multiply by a third type of twiddle factor and to selectively switch between a bypass function and a butterfly function in said recursive stage. Thereby, an implementation of non 2x-radix Fourier transformation can be achieved with moderate hardware complexity.
    • 本发明涉及一种用于实现预定向量大小的离散付里叶变换(DFT)的方法和装置,其中通过使用至少一种类型的DFT模块来提供至少一个增强型DFT模块,所述DFT模块包括第一和第二类型 通过中间积分级分离的各个不同乘法阶段的旋转因子,以及通过将至少一种类型的DFT模块与被配置为乘以第三类旋转因子的递归级组合来生成增强型DFT模块,并且选择性地在 旁路功能和蝴蝶功能在所述递归阶段。 因此,可以以适度的硬件复杂度实现非2x基数傅里叶变换的实现。
    • 4. 发明申请
    • Multi-Stream Fft for Mimo-Ofdm Systems
    • 用于Mimo-Ofdm系统的多流Fft
    • US20080256159A1
    • 2008-10-16
    • US10588895
    • 2005-06-30
    • Ludwig SchwoererErnst Zielinski
    • Ludwig SchwoererErnst Zielinski
    • G06F17/14
    • G06F17/142H04L1/06H04L27/265
    • The present invention proposes a signal processor for Fast Fourier Transformation, FFT, of MR, MR>1, input data streams of 2k samples each, supplied in parallel. After multiplexing the input data streams in an interlaced manner, the resulting stream is subjected to FFT. The FFT device has a pipeline architecture composed of k stages with a respective feedback path including a single delay element per each stage of the pipeline architecture. The delay element and timing signals are adapted to cope with FFT processing of the multiplexed streams using the single FFT device only. After processing, the FFT processed data stream is demultiplexed. The present invention also concerns a corresponding signal processing method.
    • 本发明提出了一种用于快速傅里叶变换,FFT,M SUB R 1,1/2的输入数据流的信号处理器, 每个采样并行提供。 以隔行扫描的方式复用输入数据流之后,对所得到的流进行FFT处理。 FFT装置具有由具有相应反馈路径的k个级组成的流水线架构,其包括每个流水线架构的每个阶段的单个延迟元件。 延迟元件和定时信号仅适用于使用单个FFT器件来处理复用流的FFT处理。 在处理之后,对FFT处理的数据流进行解复用。 本发明还涉及相应的信号处理方法。
    • 5. 发明申请
    • Optimized DFT implementation
    • 优化DFT实现
    • US20070299903A1
    • 2007-12-27
    • US11526122
    • 2006-09-25
    • Yuhuan XuLudwig Schwoerer
    • Yuhuan XuLudwig Schwoerer
    • G06F7/52
    • G06F17/142
    • The present invention relates to a method and apparatus for implementing a discrete Fourier transformation (DFT) of a predetermined vector size, wherein at least one DFT module is configured to perform DFTs of a first predetermined number and of a vector size corresponding to a second predetermined number, to multiply by twiddle factors, and to perform DFTs of said second predetermined number and of a vector size corresponding to said first predetermined number. At least two of the at least one DFT module are combined to obtain the predetermined vector size. Thereby, an implementation of non 2x-radix Fourier transformation can be achieved with moderate hardware complexity.
    • 本发明涉及一种用于实现预定向量大小的离散付里叶变换(DFT)的方法和装置,其中至少一个DFT模块被配置为执行第一预定数量的DFT和对应于第二预定数量的矢量大小 数字乘以旋转因子,并且执行所述第二预定数量的DFT和对应于所述第一预定数量的向量大小。 组合至少一个DFT模块中的至少两个以获得预定的矢量大小。 因此,可以以适度的硬件复杂度实现非二阶傅里叶变换的实现。
    • 8. 发明授权
    • Frequency dependent phase rotation prior to mapping in an OFDM transmitter
    • 在OFDM发射机中映射之前的频率相位相位旋转
    • US08059751B2
    • 2011-11-15
    • US12069239
    • 2008-02-08
    • Ernst ZielinskiLudwig Schwoerer
    • Ernst ZielinskiLudwig Schwoerer
    • H04L27/36H04L5/12H04L23/02
    • H04L27/2607H04L27/2634
    • An input bit stream is phase rotated by reversing bit pairs and inverting bits. The manipulated bit stream is mapped to a symbol and the mapped symbol is converted to the time domain such that an output of the time domain conversion is an ordered set of N samples that allow efficient cyclic prefix insertion without rotation at the symbol level. A first portion of the set of samples is stored in a buffer, and the complete set of samples is output followed by the buffered first portion of the set of samples for transmission. The set of samples can be NIFFT samples of an OFDM symbol and the first portion can be NCP samples that make up the cyclic prefix CP. Re-ordering the bits can be done by swapping bit pairs and inverting one of the swapped pairs, or by trivial (1, −1, −j) phase rotation. The buffer is ¼ the length of prior art OFDM buffers and CP-related processing delays are significantly reduced.
    • 输入位流通过反转位对和反相位相位旋转。 被操纵的比特流被映射到符号,并且将映射的符号转换为时域,使得时域转换的输出是允许有效的循环前缀插入而不在符号级别旋转的N个样本的有序集合。 该组样本的第一部分被存储在缓冲器中,并且完整的样本集合被输出,随后是用于传输的采样集合的缓冲的第一部分。 该样本集可以是OFDM符号的NIFFT样本,并且第一部分可以是组成循环前缀CP的NCP样本。 重新排序位可以通过交换位对和反转交换对之一,或通过平凡(1,-1,-j)相位旋转来完成。 缓冲器是1/4现有技术的OFDM缓冲器的长度,CP相关的处理延迟显着降低。
    • 9. 发明申请
    • Frequency dependent phase rotation prior to mapping in an OFDM transmitter
    • 在OFDM发射机中映射之前的频率相位相位旋转
    • US20090202007A1
    • 2009-08-13
    • US12069239
    • 2008-02-08
    • Ernst ZielinskiLudwig Schwoerer
    • Ernst ZielinskiLudwig Schwoerer
    • H04L27/28G06F17/14
    • H04L27/2607H04L27/2634
    • An input bit stream is phase rotated by reversing bit pairs and inverting bits. The manipulated bit stream is mapped to a symbol and the mapped symbol is converted to the time domain such that an output of the time domain conversion is an ordered set of N samples that allow efficient cyclic prefix insertion without rotation at the symbol level. A first portion of the set of samples is stored in a buffer, and the complete set of samples is output followed by the buffered first portion of the set of samples for transmission. The set of samples can be NIFFT samples of an OFDM symbol and the first portion can be NCP samples that make up the cyclic prefix CP. Re-ordering the bits can be done by swapping bit pairs and inverting one of the swapped pairs, or by trivial (1, −1, −j) phase rotation. The buffer is ¼ the length of prior art OFDM buffers and CP-related processing delays are significantly reduced.
    • 输入位流通过反转位对和反相位相位旋转。 被操纵的比特流被映射到符号,并且将映射的符号转换为时域,使得时域转换的输出是允许有效的循环前缀插入而不在符号级别旋转的N个样本的有序集合。 该组样本的第一部分被存储在缓冲器中,并且完整的样本集合被输出,随后是用于传输的采样集合的缓冲的第一部分。 该样本集可以是OFDM符号的NIFFT样本,并且第一部分可以是组成循环前缀CP的NCP样本。 重新排序位可以通过交换位对并反转交换对之一,或通过平凡(1,-1,-j)相位旋转来完成。 缓冲器是1/4现有技术的OFDM缓冲器的长度,CP相关的处理延迟显着降低。