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1. 发明授权

US08206995B2 Method for manufacturing a resistive switching memory device and devices obtained thereof 有权
标题翻译：制造电阻式开关存储器件的方法及其获得的器件
公开(公告)号：US08206995B2
公开(公告)日：2012-06-26
申请号：US12631361
申请日：2009-12-04
申请人： Judit Gloria Lisoni Reyes , Ludovic Goux , Dirk Wouters
发明人： Judit Gloria Lisoni Reyes , Ludovic Goux , Dirk Wouters
IPC分类号： H01L21/00 , H01L21/20
CPC分类号： H01L45/04 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/1233 , H01L45/146 , H01L45/1608
摘要： A method for manufacturing a resistive switching memory device comprises providing a substrate comprising an electrical contact, providing on the substrate a dielectric layer comprising a trench exposing the electrical contact, and providing in the trench at least the bottom electrode and the resistive switching element of the resistive memory device. The method may furthermore comprise providing a top electrode at least on or in the trench, in contact with the resistive switching element. The present invention also provides corresponding resistive switching memory devices.
摘要翻译：一种用于制造电阻式开关存储器件的方法包括提供包括电接触的衬底，在衬底上提供包括暴露电接触的沟槽的电介质层，并且至少在沟槽中提供至少底部电极和电阻开关元件电阻式存储器件。该方法还可以包括至少在沟槽中或沟槽中提供与电阻式开关元件接触的顶部电极。本发明还提供了相应的电阻式开关存储器件。

2. 发明授权

US08008644B2 Phase-change memory cell having two insulated regions 有权
标题翻译：具有两个绝缘区域的相变存储单元
公开(公告)号：US08008644B2
公开(公告)日：2011-08-30
申请号：US11914645
申请日：2006-05-18
申请人： Ludovic Goux , Dirk Wouters , Judit Lisoni , Thomas Gille
发明人： Ludovic Goux , Dirk Wouters , Judit Lisoni , Thomas Gille
IPC分类号： H01L47/00
CPC分类号： H01L45/144 , G11C13/0004 , H01L45/06 , H01L45/1226 , H01L45/148 , H01L45/1675
摘要： A phase-change-memory cell is provided which comprises two insulated regions formed in a first phase-change material connected by a region formed in a second phase-change material. The crystallization temperature of the second phase-change material is below the crystallization temperature of the first phase-change material. By locally changing the material properties using a second PCM material, which switches phase at a lower temperature, a localized “hot spot” is obtained.
摘要翻译：提供了一种相变存储单元，其包括形成在由形成在第二相变材料中的区域连接的第一相变材料中的两个绝缘区域。第二相变材料的结晶温度低于第一相变材料的结晶温度。通过使用在较低温度下切换相的第二PCM材料局部地改变材料性质，获得了局部的“热点”。

3. 发明授权

US07960775B2 Method for manufacturing a memory element comprising a resistivity-switching NiO layer and devices obtained thereof 有权
标题翻译：用于制造包括电阻率切换NiO层的存储元件的方法及其获得的器件
公开(公告)号：US07960775B2
公开(公告)日：2011-06-14
申请号：US12267427
申请日：2008-11-07
申请人： Lorene Courtade , Judit Lisoni Reyes , Ludovic Goux , Christian Turquat , Christophe Muller , Dirk Wouters
发明人： Lorene Courtade , Judit Lisoni Reyes , Ludovic Goux , Christian Turquat , Christophe Muller , Dirk Wouters
IPC分类号： H01L27/108 , H01L21/8234
CPC分类号： H01L45/1633 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/146 , H01L45/1675
摘要： The present disclosure is related to non-volatile memory devices comprising a reversible resistivity-switching layer used for storing data. The resistivity of this layer can be varied between at least two stable resistivity states such that at least one bit can be stored therein. In particular this resistivity-switching layer is a metal oxide or a metal nitride. A resistivity-switching non-volatile memory element includes a resistivity-switching metal-oxide layer sandwiched between a top electrode and a bottom electrode. The resistivity-switching metal-oxide layer has a gradient of oxygen over its thickness. The gradient is formed in a thermal oxidation step. Set and reset voltages can be tuned by using different oxygen gradients.
摘要翻译：本公开涉及包括用于存储数据的可逆电阻率切换层的非易失性存储器件。该层的电阻率可以在至少两个稳定的电阻率状态之间变化，使得可以存储至少一个位。特别地，该电阻率切换层是金属氧化物或金属氮化物。电阻率切换非易失性存储元件包括夹在顶电极和底电极之间的电阻率切换金属氧化物层。电阻率切换金属氧化物层具有其厚度上的氧梯度。梯度在热氧化步骤中形成。可以通过使用不同的氧气梯度来调节置位和复位电压。

4. 发明申请

US20100090192A1 METHOD FOR CONTROLLED FORMATION OF THE RESISTIVE SWITCHING MATERIAL IN A RESISTIVE SWITCHING DEVICE AND DEVICE OBTAINED THEREOF 审中-公开
标题翻译：用于控制在电容式开关装置中形成电阻开关材料的方法及其获得的装置
公开(公告)号：US20100090192A1
公开(公告)日：2010-04-15
申请号：US12439430
申请日：2007-08-31
申请人： Ludovic Goux , Dirk Wouters
发明人： Ludovic Goux , Dirk Wouters
IPC分类号： H01L45/00 , H01L51/40 , H01L21/16 , H01L51/30 , H01L29/12 , H01L21/28
CPC分类号： H01L45/04 , B82Y10/00 , G11C13/0007 , G11C13/0009 , G11C13/0014 , G11C2213/32 , G11C2213/79 , H01L27/2436 , H01L27/2463 , H01L27/285 , H01L45/1233 , H01L45/14 , H01L45/146 , H01L45/1608 , H01L45/1633 , H01L45/1683 , H01L51/0575
摘要： For improved scalability of resistive switching memories, a cross-point resistive switching structure is disclosed wherein the plug itself is used to store the resistive switching material and where the top electrode layer is self-aligned to the plug using, for example, chemical-mechanical-polishing (CMP) or simply mechanical-polishing.
摘要翻译：为了改进电阻式开关存储器的可扩展性，公开了一种交叉点电阻式开关结构，其中插头本身用于存储电阻开关材料，并且其中顶部电极层使用例如化学机械抛光（CMP）或简单的机械抛光。

5. 发明授权

US08526225B2 Non-volatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US08526225B2
公开(公告)日：2013-09-03
申请号：US12596721
申请日：2008-04-30
申请人： Ludovic Goux , Judit G. Lisoni Reyes , Thomas Gille , Dirk J. C. C. M. Wouters
发明人： Ludovic Goux , Judit G. Lisoni Reyes , Thomas Gille , Dirk J. C. C. M. Wouters
IPC分类号： G11C11/00
CPC分类号： H01L45/1683 , G11C13/0009 , G11C13/02 , G11C2213/15 , G11C2213/56 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/144
摘要： A memory device comprises an array of memory cells for storing data and a voltage application unit for applying voltages to the cells for writing data to the cells. Each memory cell has a first layer comprising copper in contact with a second layer comprising a chalcogenide material. The voltage application unit is arranged to write data by switching each cell between a first resistance state and a second, lower, resistance state. The voltage application unit is arranged to switch a cell to the first resistance state by applying a potential difference across the first and second layers such that the potential at the first layer is higher than the potential at the second layer by 0.5 volts or less. The voltage application unit is arranged to switch a cell to the second resistance state by applying a potential difference across the first and second layers such that the potential at the second layer is higher than the potential at the first layer by 0.5 volts or less. The current flow when switching between resistance states is less than 10 μA. The memory cells of the device can be toggled between the resistance states, and the resistance states are non-volatile.
摘要翻译：存储器件包括用于存储数据的存储器单元阵列和用于向单元施加电压以将数据写入单元的电压施加单元。每个存储单元具有包含与包含硫族化物材料的第二层接触的铜的第一层。电压施加单元被布置成通过在第一电阻状态和第二，较低电阻状态之间切换每个单元来写入数据。电压施加单元被布置成通过在第一层和第二层之间施加电位差来将单元切换到第一电阻状态，使得第一层处的电位高于第二层处的电位0.5伏或更小。电压施加单元被布置成通过施加跨越第一层和第二层的电位差使单元切换到第二电阻状态，使得第二层处的电位高于第一层的电位0.5伏或更小。在电阻状态之间切换时的电流小于10μA。器件的存储单元可以在电阻状态之间切换，并且电阻状态是非易失性的。

6. 发明授权

US08310857B2 Method for manufacturing a resistive switching memory cell comprising a nickel oxide layer operable at low-power and memory cells obtained thereof 有权
标题翻译：一种用于制造电阻式开关存储单元的方法，所述电阻式开关存储单元包括可在其获得的低功率和存储单元上操作的氧化镍层
公开(公告)号：US08310857B2
公开(公告)日：2012-11-13
申请号：US12792332
申请日：2010-06-02
申请人： Ludovic Goux , Judit Lisoni Reyes , Dirk Wouters
发明人： Ludovic Goux , Judit Lisoni Reyes , Dirk Wouters
IPC分类号： G11C11/00 , H01L29/02 , H01L47/00
CPC分类号： G11C13/0011 , G11C11/5614 , G11C2213/34 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要： A resistive switching non-volatile memory element is disclosed comprising a resistive switching metal-oxide layer sandwiched between and in contact with a top electrode and a bottom electrode, the resistive switching metal oxide layer having a substantial isotropic non-stoichiometric metal-to-oxygen ratio. For example, the memory element may comprise a nickel oxide resistive switching layer sandwiched between and in contact with a nickel top electrode and a nickel bottom electrode whereby the ratio oxygen-to-nickel of the nickel oxide layer is between 0 and 0.85.
摘要翻译：公开了一种电阻式开关非易失性存储元件，其包括夹在顶部电极和底部电极之间并与顶部电极和底部电极接触的电阻式开关金属氧化物层，电阻式开关金属氧化物层具有基本上各向同性的非化学计量的金属对氧气比。例如，存储元件可以包括夹在镍顶电极和镍底电极之间并与镍底电极接触的氧化镍电阻开关层，由此镍氧化物层的氧 - 镍比在0和0.85之间。

7. 发明申请

US20100159666A1 INTEGRATION OF CAPACITIVE ELEMENTS IN THE FORM OF PEROVSKITE CERAMIC 有权
标题翻译：电容陶瓷中电容元素的集成
公开(公告)号：US20100159666A1
公开(公告)日：2010-06-24
申请号：US12716289
申请日：2010-03-03
申请人： Ludovic Goux , Monique Gervais
发明人： Ludovic Goux , Monique Gervais
IPC分类号： H01L21/02
CPC分类号： H01L28/55 , H01L28/60
摘要： The use of a conductive bidimensional perovskite as an interface between a silicon, metal, or amorphous oxide substrate and an insulating perovskite deposited by epitaxy, as well as an integrated circuit and its manufacturing process comprising a layer of an insulating perovskite deposited by epitaxy to form the dielectric of capacitive elements having at least an electrode formed of a conductive bidimensional perovskite forming an interface between said dielectric and an underlying silicon, metal, or amorphous oxide substrate.
摘要翻译：使用导电二维钙钛矿作为硅，金属或非晶氧化物衬底之间的界面和通过外延沉积的绝缘钙钛矿，以及集成电路及其制造方法，其包括通过外延沉积的绝缘钙钛矿层以形成电容元件的电介质至少具有由导电二维钙钛矿形成的电极，其形成在所述电介质和下面的硅，金属或非晶氧化物衬底之间的界面。

8. 发明申请

US20080265237A1 Phase-Change Memory Cell Having Two Insulated Regions 有权
标题翻译：具有两个绝缘区域的相变存储单元
公开(公告)号：US20080265237A1
公开(公告)日：2008-10-30
申请号：US11914645
申请日：2006-05-18
申请人： Ludovic Goux , Dirk Wouters , Judith Lisoni , Thomas Gille
发明人： Ludovic Goux , Dirk Wouters , Judith Lisoni , Thomas Gille
IPC分类号： H01L47/00 , H01L21/00
CPC分类号： H01L45/144 , G11C13/0004 , H01L45/06 , H01L45/1226 , H01L45/148 , H01L45/1675
摘要： A phase-change-memory cell is provided which comprises two insulated regions formed in a first phase-change material connected by a region formed in a second phase-change material. The crystallization temperature of the second phase-change material is below the crystallization temperature of the first phase-change material. By locally changing the material properties using a second PCM material, which switches phase at a lower temperature, a localized “hot spot” is obtained.
摘要翻译：提供了一种相变存储单元，其包括形成在由形成在第二相变材料中的区域连接的第一相变材料中的两个绝缘区域。第二相变材料的结晶温度低于第一相变材料的结晶温度。通过使用在较低温度下切换相的第二PCM材料局部地改变材料性质，获得了局部的“热点”。

9. 发明申请

US20120228578A1 Resistive Memory Element and Related Control Method 有权
标题翻译：电阻记忆元件及相关控制方法
公开(公告)号：US20120228578A1
公开(公告)日：2012-09-13
申请号：US13416902
申请日：2012-03-09
申请人： Ludovic Goux
发明人： Ludovic Goux
IPC分类号： H01L45/00 , H01L21/8239
CPC分类号： G11C13/0007 , G11C13/0011 , G11C13/003 , G11C13/0069 , G11C2213/77 , H01L27/2472 , H01L45/04 , H01L45/1233 , H01L45/1273 , H01L45/146 , H01L45/147
摘要： Resistive memory elements and arrays of resistive memory elements are disclosed. In one embodiment, a resistive memory element includes a top electrode element lying in a plane parallel to a reference plane, and having, in perpendicular projection on the reference plane, a top electrode projection; a bottom electrode element lying in a plane parallel to the reference plane, and having, in perpendicular projection on the reference plane, a bottom electrode projection; and an active layer with changeable resistivity interposed between the top electrode element and the bottom electrode element. The top electrode projection and the bottom electrode projection overlap in an overlapping region that comprises a corner of the top electrode projection and/or a corner of the bottom electrode projection, and an area of the overlapping region constitutes less than 10% of a total projected area of the top electrode element and the bottom electrode element on the reference plane.
摘要翻译：公开了电阻式存储器元件和电阻存储器元件阵列。在一个实施例中，电阻式存储器元件包括位于平行于参考平面的平面中的顶部电极元件，并且在参考平面上的垂直投影中具有顶部电极突起; 位于与参考平面平行的平面中的底部电极元件，并且在参考平面上具有垂直投影的底部电极突起; 以及插入在所述顶部电极元件和所述底部电极元件之间的具有可变电阻的有源层。顶部电极突起和底部电极突起在包括顶部电极突起的角部和/或底部电极突起的角部的重叠区域中重叠，并且重叠区域的面积构成小于总投影的10％上电极元件和底电极元件的面积。

10. 发明授权

US08232174B2 Method for controlled formation of the resistive switching material in a resistive switching device and device obtained thereof 有权
标题翻译：在电阻式开关装置中控制形成电阻式开关材料的方法及其获得的装置
公开(公告)号：US08232174B2
公开(公告)日：2012-07-31
申请号：US12439414
申请日：2007-08-31
申请人： Ludovic Goux , Dirk Wouters
发明人： Ludovic Goux , Dirk Wouters
IPC分类号： H01L21/20 , H01L21/00
CPC分类号： H01L45/1608 , H01L27/2436 , H01L27/2463 , H01L27/285 , H01L45/04 , H01L45/1233 , H01L45/14 , H01L45/146 , H01L45/1683 , H01L51/0035 , H01L51/0051 , H01L51/0591
摘要： The present disclosure provides a method for controlled formation of the resistive switching layer in a resistive switching device. The method comprises providing a substrate (2) comprising the bottom electrode (10), providing on the substrate a dielectric layer (4) comprising a recess (7) containing the metal for forming the resistive layer (11), providing on the substrate a dielectric layer (5) comprising an opening (8) exposing the metal of the recess, and forming the resistive layer in the recess and in the opening.
摘要翻译：本公开提供了一种用于在电阻式开关装置中控制形成电阻式开关层的方法。该方法包括提供包括底部电极（10）的衬底（2），在衬底上提供包括含有用于形成电阻层（11）的金属的凹部（7）的电介质层（4），在衬底上提供电介质层（5）包括露出所述凹部的金属的开口（8），并且在所述凹部和所述开口中形成所述电阻层。

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