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1. 发明授权

US5756366A Magnetic hardening of bit edges of magnetoresistive RAM 失效
标题翻译：磁阻RAM的位边缘磁化
公开(公告)号：US5756366A
公开(公告)日：1998-05-26
申请号：US576732
申请日：1995-12-21
申请人： Lonny L. Berg , Allan T. Hurst, Jr. , Tangshiun Yeh , Paul W. Cravens
发明人： Lonny L. Berg , Allan T. Hurst, Jr. , Tangshiun Yeh , Paul W. Cravens
IPC分类号： G11C11/16 , H01L43/08 , H01L43/12 , H01L21/8246
CPC分类号： H01L43/12 , G11C11/16 , H01L43/08
摘要： Magnetoresistive random access memory bit edges are magnetically hardened to prevent bit edge reversal.
摘要翻译：磁阻随机存取存储器位边缘被磁化硬化以防止位边缘反转。

2. 发明授权

US07383626B2 Methods for fabricating giant magnetoresistive (GMR) devices 失效
标题翻译：制造巨磁阻（GMR）器件的方法
公开(公告)号：US07383626B2
公开(公告)日：2008-06-10
申请号：US11508671
申请日：2006-08-22
申请人： Daniel L. Baseman , Lonny L. Berg , Romney R. Katti , Daniel S. Reed , Gordon A. Shaw , Wei D. Z. Zou
发明人： Daniel L. Baseman , Lonny L. Berg , Romney R. Katti , Daniel S. Reed , Gordon A. Shaw , Wei D. Z. Zou
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： G11C11/16 , G11B5/39 , H01L43/12 , Y10T29/49032 , Y10T29/49041 , Y10T29/49043 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052 , Y10T29/49155
摘要： In a method of fabricating a giant magnetoresistive (GMR) device a plurality of magnetoresistive device layers is deposited on a first silicon nitride layer formed on a silicon oxide layer. An etch stop is formed on the magnetoresistive device layers, and a second layer of silicon nitride is formed on the etch stop. The magnetoresistive device layers are patterned to define a plurality of magnetic bits having sidewalls. The second silicon nitride layer is patterned to define electrical contact portions on the etch stop in each magnetic bit. The sidewalls of the magnetic bits are covered with a photoresist layer. A reactive ion etch (RIE) process is used to etch into the first silicon nitride and silicon oxide layers to expose electrical contacts. The photoresist layer and silicon nitride layers protect the magnetoresistive layers from exposure to oxygen during the etching into the silicon oxide layer.
摘要翻译：在制造巨磁阻（GMR）器件的方法中，多个磁阻器件层沉积在形成于氧化硅层上的第一氮化硅层上。在磁阻器件层上形成蚀刻停止层，在蚀刻停止层上形成第二氮化硅层。图案化磁阻器件层以限定具有侧壁的多个磁性位。将第二氮化硅层图案化以限定每个磁头中蚀刻停止点上的电接触部分。磁头的侧壁被光致抗蚀剂层覆盖。使用反应离子蚀刻（RIE）工艺来蚀刻到第一氮化硅和氧化硅层中以暴露电触点。在蚀刻到氧化硅层期间，光致抗蚀剂层和氮化硅层保护磁阻层免受暴露于氧气。

3. 发明授权

US07114240B2 Method for fabricating giant magnetoresistive (GMR) devices 失效
标题翻译：制造巨磁阻（GMR）器件的方法
公开(公告)号：US07114240B2
公开(公告)日：2006-10-03
申请号：US10706531
申请日：2003-11-12
申请人： Daniel L. Baseman , Lonny L. Berg , Romney R. Katti , Daniel S. Reed , Gordon A. Shaw , Wei D. Z. Zou
发明人： Daniel L. Baseman , Lonny L. Berg , Romney R. Katti , Daniel S. Reed , Gordon A. Shaw , Wei D. Z. Zou
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： G11C11/16 , G11B5/39 , H01L43/12 , Y10T29/49032 , Y10T29/49041 , Y10T29/49043 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052 , Y10T29/49155
摘要： In a method of fabricating a giant magnetoresistive (GMR) device a plurality of magnetoresistive device layers is deposited on a first silicon nitride layer formed on a silicon oxide layer. An etch stop is formed on the magnetoresistive device layers, and a second layer of silicon nitride is formed on the etch stop. The magnetoresistive device layers are patterned to define a plurality of magnetic bits having sidewalls. The second silicon nitride layer is patterned to define electrical contact portions on the etch stop in each magnetic bit. The sidewalls of the magnetic bits are covered with a photoresist layer. A reactive ion etch (RIE) process is used to etch into the first silicon nitride and silicon oxide layers to expose electrical contacts. The photoresist layer and silicon nitride layers protect the magnetoresistive layers from exposure to oxygen during the etching into the silicon oxide layer.
摘要翻译：在制造巨磁阻（GMR）器件的方法中，多个磁阻器件层沉积在形成于氧化硅层上的第一氮化硅层上。在磁阻器件层上形成蚀刻停止层，在蚀刻停止层上形成第二氮化硅层。图案化磁阻器件层以限定具有侧壁的多个磁性位。将第二氮化硅层图案化以限定每个磁头中蚀刻停止点上的电接触部分。磁头的侧壁被光致抗蚀剂层覆盖。使用反应离子蚀刻（RIE）工艺来蚀刻到第一氮化硅和氧化硅层中以暴露电触点。在蚀刻到氧化硅层期间，光致抗蚀剂层和氮化硅层保护磁阻层免受暴露于氧气。

4. 发明授权

US07423329B2 Semiconductor device and magneto-resistive sensor integration 有权
标题翻译：半导体器件和磁阻传感器集成
公开(公告)号：US07423329B2
公开(公告)日：2008-09-09
申请号：US11742335
申请日：2007-04-30
申请人： William F. Witcraft , Lonny L. Berg , Mark D. Amundson
发明人： William F. Witcraft , Lonny L. Berg , Mark D. Amundson
IPC分类号： H01L29/82 , H01L43/00
CPC分类号： G01R33/096 , G01R33/09
摘要： A magnetic-sensing apparatus and method of making and using thereof is provided. The sensing apparatus may be fabricated from semiconductor circuitry and a magneto-resistive sensor. A dielectric may be disposed between the semiconductor circuitry and the magneto-resistive sensor. In one embodiment, the semiconductor circuitry and magneto-resistive sensor are formed into a single package or, alternatively, monolithically formed into a single chip. In another embodiment, some of the semiconductor circuitry may be monolithically formed on a first chip with the magneto-resistive sensor, while other portions of the semiconductor circuitry may be formed on a second chip. As such, the first and second chips may be placed in close proximity and electrically connected together or alternatively have no intentional electrical interaction. Exemplary semiconductor devices that might be implemented include, without limitation, capacitors, inductors, operational amplifiers, set/reset circuitry for the MR sensors, accelerometers, pressure sensors, position sensing circuitry, compassing circuitry, etc.
摘要翻译：提供了一种磁感测装置及其制造和使用方法。感测装置可以由半导体电路和磁阻传感器制造。电介质可以设置在半导体电路和磁阻传感器之间。在一个实施例中，半导体电路和磁阻传感器形成为单个封装，或者替代地，单片地形成为单个芯片。在另一个实施例中，半导体电路中的一些可以在第一芯片上与磁阻传感器一体地形成，而半导体电路的其它部分可以形成在第二芯片上。因此，第一和第二芯片可以被放置在紧密接近并电连接在一起，或者不具有有意的电相互作用。可能实现的示例性半导体器件包括但不限于电容器，电感器，运算放大器，用于MR传感器的设置/复位电路，加速度计，压力传感器，位置感测电路，罗盘电路等。

5. 发明授权

US07239000B2 Semiconductor device and magneto-resistive sensor integration 有权
标题翻译：半导体器件和磁阻传感器集成
公开(公告)号：US07239000B2
公开(公告)日：2007-07-03
申请号：US10754946
申请日：2004-01-08
申请人： William F. Witcraft , Lonny L. Berg , Mark D. Amundson
发明人： William F. Witcraft , Lonny L. Berg , Mark D. Amundson
IPC分类号： H01L29/82 , H01L43/00
CPC分类号： G01R33/096 , G01R33/09
摘要： A magnetic-sensing apparatus and method of making and using thereof is provided. The sensing apparatus may be fabricated from semiconductor circuitry and a magneto-resistive sensor. A dielectric may be disposed between the semiconductor circuitry and the magneto-resistive sensor. In one embodiment, the semiconductor circuitry and magneto-resistive sensor are formed into a single package or, alternatively, monolithically formed into a single chip. In another embodiment, some of the semiconductor circuitry may be monolithically formed on a first chip with the magneto-resistive sensor, while other portions of the semiconductor circuitry may be formed on a second chip. As such, the first and second chips may be placed in close proximity and electrically connected together or alternatively have no intentional electrical interaction, Exemplary semiconductor devices that might be implemented include, without limitation, capacitors, inductors, operational amplifiers, set/reset circuitry for the magneto-resistive sensors, accelerometers, pressure sensors, position sensing circuitry, compassing circuitry, etc.
摘要翻译：提供了一种磁感测装置及其制造和使用方法。感测装置可以由半导体电路和磁阻传感器制造。电介质可以设置在半导体电路和磁阻传感器之间。在一个实施例中，半导体电路和磁阻传感器形成为单个封装，或者替代地，单片地形成为单个芯片。在另一个实施例中，半导体电路中的一些可以在第一芯片上与磁阻传感器一体地形成，而半导体电路的其它部分可以形成在第二芯片上。这样，第一和第二芯片可以被放置在紧密接近并且电连接在一起或者替代地不具有有意的电相互作用。可以实现的示例性半导体器件包括但不限于电容器，电感器，运算放大器，用于磁阻传感器，加速度计，压力传感器，位置检测电路，罗盘电路等

6. 发明授权

US5982658A MRAM design to reduce dissimilar nearest neighbor effects 失效
标题翻译： MRAM设计来减少不相似的最近邻效应
公开(公告)号：US5982658A
公开(公告)日：1999-11-09
申请号：US962518
申请日：1997-10-31
申请人： Lonny L. Berg , Paul W. Cravens , Allan T. Hurst , Tangshiun Yeh
发明人： Lonny L. Berg , Paul W. Cravens , Allan T. Hurst , Tangshiun Yeh
IPC分类号： G11C11/16 , G11C11/15
CPC分类号： G11C11/16
摘要： A magnetoresistive memory array which has a row of active sense lines with each sense line including magnetoresistive bits and word lines extending over the bits. Each active sense line ending in a termination bit having a configuration selected to cause an adjacent bit to experience a magnetic field similar to that experienced by the remaining bits in the sense line. An inactive sense line located at each end of the row of active sense lines.
摘要翻译：一种磁阻存储器阵列，其具有一行主动感测线，每条感测线包括磁阻位和在该位上延伸的字线。每个有源感测线以具有被选择为使相邻位经历类似于感测线中的剩余位所经历的磁场的配置的结束位结束。位于活动感测线的行的每一端的无效感测线。

7. 发明授权

US5569617A Method of making integrated spacer for magnetoresistive RAM 失效
标题翻译：制造用于磁阻RAM的集成间隔物的方法
公开(公告)号：US5569617A
公开(公告)日：1996-10-29
申请号：US576279
申请日：1995-12-21
申请人： Tangshiun Yeh , Allan T. Hurst , Huang-Joung Chen , Lonny L. Berg , William F. Witcraft
发明人： Tangshiun Yeh , Allan T. Hurst , Huang-Joung Chen , Lonny L. Berg , William F. Witcraft
IPC分类号： H01L27/16 , H01L43/12 , H01L21/70
CPC分类号： H01L43/12
摘要： In a magnetoresistive random access memory device, a spacer material is deposited at the edges of a memory bit to maintain magnetization at the edges in a direction along the edges.
摘要翻译：在磁阻随机存取存储器件中，间隔物材料沉积在存储器钻头的边缘处，以保持边沿沿着边缘的方向的边缘的磁化。

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